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Searched refs:__raw_writeq (Results 1 – 25 of 59) sorted by relevance

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/linux/arch/mips/sibyte/common/
H A Dsb_tbprof.c152 __raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1)); in arm_tb()
165 __raw_writeq( in arm_tb()
199 __raw_writeq(M_SCD_TRACE_CFG_START_READ, in sbprof_tb_intr()
221 __raw_writeq(M_SCD_TRACE_CFG_RESET, in sbprof_tb_intr()
294 __raw_writeq(K_BCM1480_INT_MAP_I3, in sbprof_zbprof_start()
298 __raw_writeq(K_INT_MAP_I3, in sbprof_zbprof_start()
304 __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_0)); in sbprof_zbprof_start()
305 __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_1)); in sbprof_zbprof_start()
306 __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_2)); in sbprof_zbprof_start()
307 __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_3)); in sbprof_zbprof_start()
[all …]
/linux/drivers/net/ethernet/broadcom/
H A Dsb1250-mac.c1451 __raw_writeq(0, port); in sbmac_channel_start()
1461 __raw_writeq(0, port); in sbmac_channel_start()
1471 __raw_writeq(0, port); in sbmac_channel_start()
1478 __raw_writeq(0, port); in sbmac_channel_start()
1490 __raw_writeq(reg, port); in sbmac_channel_start()
1493 __raw_writeq(reg, port); in sbmac_channel_start()
1501 __raw_writeq(0, s->sbm_imr); in sbmac_channel_start()
1601 __raw_writeq(0, s->sbm_imr); in sbmac_channel_stop()
2074 __raw_writeq(0, port); in sbmac_setmulti()
2079 __raw_writeq(0, port); in sbmac_setmulti()
[all …]
/linux/arch/mips/kernel/
H A Dcevt-bcm1480.c39 __raw_writeq(0, cfg); in sibyte_set_periodic()
40 __raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1, init); in sibyte_set_periodic()
41 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, cfg); in sibyte_set_periodic()
53 __raw_writeq(0, cfg); in sibyte_shutdown()
65 __raw_writeq(0, cfg); in sibyte_next_event()
66 __raw_writeq(delta - 1, init); in sibyte_next_event()
67 __raw_writeq(M_SCD_TIMER_ENABLE, cfg); in sibyte_next_event()
129 __raw_writeq(IMR_IP4_VAL, in sb1480_clockevent_init()
H A Dcevt-sb1250.c36 __raw_writeq(0, cfg); in sibyte_shutdown()
49 __raw_writeq(0, cfg); in sibyte_set_periodic()
50 __raw_writeq((V_SCD_TIMER_FREQ / HZ) - 1, init); in sibyte_set_periodic()
51 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, cfg); in sibyte_set_periodic()
64 __raw_writeq(0, cfg); in sibyte_next_event()
65 __raw_writeq(delta - 1, init); in sibyte_next_event()
66 __raw_writeq(M_SCD_TIMER_ENABLE, cfg); in sibyte_next_event()
129 __raw_writeq(IMR_IP4_VAL, in sb1250_clockevent_init()
H A Dcsrc-sb1250.c58 __raw_writeq(0, in sb1250_clocksource_init()
61 __raw_writeq(SB1250_HPT_VALUE, in sb1250_clocksource_init()
64 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, in sb1250_clocksource_init()
/linux/arch/mips/sibyte/swarm/
H A Drtc_m41t81.c88 __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD)); in m41t81_read()
89 __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR1BYTE, in m41t81_read()
95 __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE, in m41t81_read()
103 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); in m41t81_read()
115 __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD)); in m41t81_write()
116 __raw_writeq(b & 0xff, SMB_CSR(R_SMB_DATA)); in m41t81_write()
117 __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR2BYTE, in m41t81_write()
125 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); in m41t81_write()
130 __raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE, in m41t81_write()
H A Drtc_xicor1241.c63 __raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD)); in xicor_read()
64 __raw_writeq(addr & 0xff, SMB_CSR(R_SMB_DATA)); in xicor_read()
65 __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE, in xicor_read()
71 __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE, in xicor_read()
79 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); in xicor_read()
91 __raw_writeq(addr, SMB_CSR(R_SMB_CMD)); in xicor_write()
92 __raw_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA)); in xicor_write()
93 __raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE, in xicor_write()
101 __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); in xicor_write()
/linux/arch/mips/sibyte/sb1250/
H A Dirq.c155 __raw_writeq(pending, in ack_sb1250_irq()
230 __raw_writeq(IMR_IP2_VAL, in arch_init_irq()
234 __raw_writeq(IMR_IP2_VAL, in arch_init_irq()
247 __raw_writeq(IMR_IP3_VAL, in arch_init_irq()
250 __raw_writeq(IMR_IP3_VAL, in arch_init_irq()
255 __raw_writeq(0xffffffffffffffffULL, in arch_init_irq()
257 __raw_writeq(0xffffffffffffffffULL, in arch_init_irq()
262 __raw_writeq(tmp, IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MASK))); in arch_init_irq()
263 __raw_writeq(tmp, IOADDR(A_IMR_REGISTER(1, R_IMR_INTERRUPT_MASK))); in arch_init_irq()
/linux/arch/mips/sibyte/bcm1480/
H A Dirq.c168 __raw_writeq(pending, IOADDR(A_BCM1480_IMR_REGISTER(cpu_logical_map(i), in ack_bcm1480_irq()
172 …__raw_writeq(pending, IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_LDT_INTERRUPT_CLR_H + (k*BCM1… in ack_bcm1480_irq()
248 __raw_writeq(IMR_IP2_VAL, in arch_init_irq()
257 __raw_writeq(IMR_IP2_VAL, in arch_init_irq()
271 __raw_writeq(IMR_IP3_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H) + in arch_init_irq()
278 __raw_writeq(0xffffffffffffffffULL, in arch_init_irq()
280 __raw_writeq(0xffffffffffffffffULL, in arch_init_irq()
288 __raw_writeq(tmp, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MASK_H))); in arch_init_irq()
292 __raw_writeq(tmp, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MASK_L))); in arch_init_irq()
H A Dsmp.c69 __raw_writeq((((u64)action)<< 48), mailbox_0_set_regs[cpu]); in bcm1480_send_ipi_single()
169 __raw_writeq(((u64)action)<<48, mailbox_0_clear_regs[cpu]); in bcm1480_mailbox_interrupt()
/linux/include/asm-generic/
H A Dlogic_io.h63 #define __raw_writeq __raw_writeq macro
64 void __raw_writeq(u64 value, volatile void __iomem *addr);
H A Dvideo.h103 #if defined(__raw_writeq)
106 __raw_writeq(b, addr); in fb_writeq()
H A Dio.h172 #ifndef __raw_writeq
173 #define __raw_writeq __raw_writeq macro
174 static inline void __raw_writeq(u64 value, volatile void __iomem *addr) in __raw_writeq() function
291 __raw_writeq((u64 __force)__cpu_to_le64(value), addr); in writeq()
390 __raw_writeq((u64 __force)__cpu_to_le64(value), addr); in writeq_relaxed()
520 __raw_writeq(*buf++, addr); in writesq()
/linux/arch/arm64/include/asm/
H A Dio.h45 #define __raw_writeq __raw_writeq macro
46 static __always_inline void __raw_writeq(u64 val, volatile void __iomem *addr) in __raw_writeq() function
248 __raw_writeq(*from, to); in __const_memcpy_toio_aligned64()
292 #define iowrite64be(v,p) ({ __iowmb(); __raw_writeq((__force __u64)cpu_to_be64(v), p); })
/linux/arch/riscv/include/asm/
H A Dmmio.h38 #define __raw_writeq __raw_writeq macro
39 static inline void __raw_writeq(u64 val, volatile void __iomem *addr) in __raw_writeq() function
98 #define writeq_cpu(v, c) ((void)__raw_writeq((__force u64)cpu_to_le64(v), (c)))
/linux/arch/mips/sgi-ip27/
H A Dip27-irq.c58 __raw_writeq(mask[0], hd->irq_mask[0]); in enable_hub_irq()
59 __raw_writeq(mask[1], hd->irq_mask[1]); in enable_hub_irq()
68 __raw_writeq(mask[0], hd->irq_mask[0]); in disable_hub_irq()
69 __raw_writeq(mask[1], hd->irq_mask[1]); in disable_hub_irq()
/linux/arch/loongarch/kernel/
H A Dio.c50 __raw_writeq(*(u64 *)from, to); in __memcpy_toio()
83 __raw_writeq(qc, dst); in __memset_io()
/linux/drivers/infiniband/hw/mthca/
H A Dmthca_doorbell.h56 __raw_writeq((__force u64) val, dest); in mthca_write64_raw()
62 __raw_writeq((__force u64) cpu_to_be64((u64) hi << 32 | lo), dest); in mthca_write64()
/linux/drivers/i2c/busses/
H A Di2c-octeon-core.h140 __raw_writeq(val, addr); in octeon_i2c_writeq_flush()
157 __raw_writeq(SW_TWSI_V | eop_reg | data, i2c->twsi_base + OCTEON_REG_SW_TWSI(i2c)); in octeon_i2c_reg_write()
185 __raw_writeq(SW_TWSI_V | eop_reg | SW_TWSI_R, i2c->twsi_base + OCTEON_REG_SW_TWSI(i2c)); in octeon_i2c_reg_read()
/linux/arch/arm64/kernel/
H A Dio.c95 __raw_writeq(*(u64 *)from, to); in __memcpy_toio()
128 __raw_writeq(qc, dst); in __memset_io()
/linux/arch/alpha/kernel/
H A Dio.c158 void __raw_writeq(u64 b, volatile void __iomem *addr) in __raw_writeq() function
170 EXPORT_SYMBOL(__raw_writeq);
229 __raw_writeq(b, addr); in writeq()
547 __raw_writeq(*(const u64 *)from, to); in memcpy_toio()
620 __raw_writeq(c, to); in _memset_c_io()
/linux/arch/sparc/include/asm/
H A Dio_64.h93 #define __raw_writeq __raw_writeq macro
94 static inline void __raw_writeq(u64 q, const volatile void __iomem *addr) in __raw_writeq() function
341 __raw_writeq(q, addr); in sbus_writeq()
/linux/arch/alpha/include/asm/
H A Dio.h270 extern void __raw_writeq(u64 b, volatile void __iomem *addr);
278 #define __raw_writeq __raw_writeq macro
499 extern inline void __raw_writeq(u64 b, volatile void __iomem *addr) in __raw_writeq() function
531 __raw_writeq(b, addr); in writeq()
/linux/include/linux/mlx5/
H A Ddoorbell.h53 __raw_writeq(*(u64 *)val, dest); in mlx5_write64()
/linux/arch/mips/include/asm/
H A Dvideo.h31 __raw_writeq(b, addr); in fb_writeq()

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