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Searched refs:cdm (Results 1 – 25 of 27) sorted by relevance

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/linux/arch/powerpc/platforms/52xx/
H A Dlite5200.c56 struct mpc52xx_cdm __iomem *cdm; in lite5200_fix_clock_config() local
59 cdm = of_iomap(np, 0); in lite5200_fix_clock_config()
61 if (!cdm) { in lite5200_fix_clock_config()
68 out_8(&cdm->ext_48mhz_en, 0x00); in lite5200_fix_clock_config()
69 out_8(&cdm->fd_enable, 0x01); in lite5200_fix_clock_config()
70 if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */ in lite5200_fix_clock_config()
71 out_be16(&cdm->fd_counters, 0x0001); in lite5200_fix_clock_config()
73 out_be16(&cdm->fd_counters, 0x5555); in lite5200_fix_clock_config()
76 iounmap(cdm); in lite5200_fix_clock_config()
H A Dlite5200_pm.c14 static struct mpc52xx_cdm __iomem *cdm; variable
77 cdm = mbar + 0x200; in lite5200_pm_prepare()
102 _memcpy_fromio(&scdm, cdm, sizeof(*cdm)); in lite5200_save_regs()
138 out_8(&cdm->ipb_clk_sel, scdm.ipb_clk_sel); in lite5200_restore_regs()
139 out_8(&cdm->pci_clk_sel, scdm.pci_clk_sel); in lite5200_restore_regs()
141 out_8(&cdm->ext_48mhz_en, scdm.ext_48mhz_en); in lite5200_restore_regs()
142 out_8(&cdm->fd_enable, scdm.fd_enable); in lite5200_restore_regs()
143 out_be16(&cdm->fd_counters, scdm.fd_counters); in lite5200_restore_regs()
145 out_be32(&cdm->clk_enables, scdm.clk_enables); in lite5200_restore_regs()
147 out_8(&cdm->osc_disable, scdm.osc_disable); in lite5200_restore_regs()
[all …]
H A Dmpc52xx_pm.c21 static struct mpc52xx_cdm __iomem *cdm; variable
90 cdm = mbar + 0x200; in mpc52xx_pm_prepare()
140 out_8(&cdm->ccs_sleep_enable, 1); in mpc52xx_pm_enter()
141 out_8(&cdm->osc_sleep_enable, 1); in mpc52xx_pm_enter()
142 out_8(&cdm->ccs_qreq_test, 1); in mpc52xx_pm_enter()
145 clk_enables = in_be32(&cdm->clk_enables); in mpc52xx_pm_enter()
146 out_be32(&cdm->clk_enables, clk_enables & 0x00088000); in mpc52xx_pm_enter()
162 mpc52xx_deep_sleep(sram, sdram, cdm, intr); in mpc52xx_pm_enter()
173 out_be32(&cdm->clk_enables, clk_enables); in mpc52xx_pm_enter()
174 out_8(&cdm->ccs_sleep_enable, 0); in mpc52xx_pm_enter()
[all …]
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_cdm.c170 static int dpu_hw_cdm_enable(struct dpu_hw_cdm *ctx, struct dpu_hw_cdm_cfg *cdm) in dpu_hw_cdm_enable() argument
177 if (!ctx || !cdm) in dpu_hw_cdm_enable()
180 fmt = cdm->output_fmt; in dpu_hw_cdm_enable()
185 dpu_hw_csc_setup(&ctx->hw, CDM_CSC_10_MATRIX_COEFF_0, cdm->csc_cfg, true); in dpu_hw_cdm_enable()
186 dpu_hw_cdm_setup_cdwn(ctx, cdm); in dpu_hw_cdm_enable()
188 if (cdm->output_type == CDM_CDWN_OUTPUT_HDMI) { in dpu_hw_cdm_enable()
200 ctx->ops.bind_pingpong_blk(ctx, cdm->pp_id); in dpu_hw_cdm_enable()
H A Ddpu_hw_cdm.h95 int (*enable)(struct dpu_hw_cdm *cdm, struct dpu_hw_cdm_cfg *cfg);
102 void (*bind_pingpong_blk)(struct dpu_hw_cdm *cdm, const enum dpu_pingpong pp);
134 const struct dpu_cdm_cfg *cdm, void __iomem *addr,
H A Ddpu_hw_ctl.c584 if (cfg->cdm) in dpu_hw_ctl_intf_cfg_v1()
585 DPU_REG_WRITE(c, CTL_CDM_ACTIVE, cfg->cdm); in dpu_hw_ctl_intf_cfg_v1()
666 if (cfg->cdm) { in dpu_hw_ctl_reset_intf_cfg_v1()
668 cdm_active &= ~cfg->cdm; in dpu_hw_ctl_reset_intf_cfg_v1()
H A Ddpu_hw_ctl.h52 enum dpu_cdm cdm; member
H A Ddpu_kms.c597 yuv_supported = !!dpu_kms->catalog->cdm; in _dpu_kms_initialize_displayport()
964 if (cat->cdm) in dpu_kms_mdp_snapshot()
965 msm_disp_snapshot_add_block(disp_state, cat->cdm->len, in dpu_kms_mdp_snapshot()
966 dpu_kms->mmio + cat->cdm->base, cat->cdm->name); in dpu_kms_mdp_snapshot()
H A Ddpu_hw_catalog.h819 const struct dpu_cdm_cfg *cdm; member
H A Ddpu_rm.c179 if (cat->cdm) { in dpu_rm_init()
182 hw = dpu_hw_cdm_init(dev, cat->cdm, mmio, cat->mdss_ver); in dpu_rm_init()
H A Ddpu_encoder_phys_wb.c244 intf_cfg.cdm = hw_cdm->idx; in dpu_encoder_phys_wb_setup_ctl()
/linux/drivers/spi/
H A Dspi-ppc4xx.c108 u8 cdm; member
169 u8 cdm = 0; in spi_ppc4xx_setupxfer() local
196 cdm = min(scr, 0xff); in spi_ppc4xx_setupxfer()
198 dev_dbg(&spi->dev, "setting pre-scaler to %d (hz %d)\n", cdm, speed); in spi_ppc4xx_setupxfer()
200 if (in_8(&hw->regs->cdm) != cdm) in spi_ppc4xx_setupxfer()
201 out_8(&hw->regs->cdm, cdm); in spi_ppc4xx_setupxfer()
/linux/drivers/net/can/mscan/
H A Dmpc5xxx_can.c48 struct mpc52xx_cdm __iomem *cdm; in mpc52xx_can_get_clock() local
81 cdm = of_iomap(np_cdm, 0); in mpc52xx_can_get_clock()
82 if (!cdm) { in mpc52xx_can_get_clock()
88 if (in_8(&cdm->ipb_clk_sel) & 0x1) in mpc52xx_can_get_clock()
90 val = in_be32(&cdm->rstcfg); in mpc52xx_can_get_clock()
96 iounmap(cdm); in mpc52xx_can_get_clock()
/linux/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_cfg.c714 .cdm = {
909 .cdm = {
1000 .cdm = {
1102 .cdm = {
1200 .cdm = {
1298 .cdm = {
H A Dmdp5_cfg.h110 struct mdp5_sub_block cdm; member
/linux/arch/powerpc/boot/dts/
H A Dtqm5200.dts49 cdm@200 {
50 compatible = "fsl,mpc5200-cdm";
H A Dmpc5200b.dtsi50 cdm@200 {
51 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
H A Dcharon.dts52 cdm@200 {
53 compatible = "fsl,mpc5200-cdm";
H A Dlite5200.dts49 cdm@200 {
50 compatible = "fsl,mpc5200-cdm";
H A Da4m072.dts32 cdm@200 {
/linux/Documentation/devicetree/bindings/pci/
H A Drcar-gen4-pci-host.yaml127 snps,enable-cdm-check;
H A Dsnps,dw-pcie-common.yaml254 snps,enable-cdm-check:
/linux/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_7_2_sc7280.h251 .cdm = &sc7280_cdm,
H A Ddpu_6_0_sm8250.h387 .cdm = &sc7280_cdm,
/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dmpc5200.txt76 cdm@<addr> fsl,mpc5200-cdm Clock Distribution

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