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Searched refs:clock_rate (Results 1 – 25 of 44) sorted by relevance

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/linux/drivers/clk/mxs/
H A Dclk-ssp.c24 u32 clock_divide, clock_rate; in mxs_ssp_set_clk_rate() local
30 clock_rate = DIV_ROUND_UP(ssp_clk, rate * clock_divide); in mxs_ssp_set_clk_rate()
31 clock_rate = (clock_rate > 0) ? clock_rate - 1 : 0; in mxs_ssp_set_clk_rate()
32 if (clock_rate <= 255) in mxs_ssp_set_clk_rate()
42 ssp_sck = ssp_clk / clock_divide / (1 + clock_rate); in mxs_ssp_set_clk_rate()
47 val |= BF_SSP(clock_rate, TIMING_CLOCK_RATE); in mxs_ssp_set_clk_rate()
54 __func__, clock_divide, clock_rate, ssp_clk, ssp_sck, rate); in mxs_ssp_set_clk_rate()
/linux/drivers/media/platform/qcom/camss/
H A Dcamss.c40 .clock_rate = { { 0 },
53 .clock_rate = { { 0 },
69 .clock_rate = { { 0 },
87 .clock_rate = { { 0 },
118 .clock_rate = { { 0 },
141 .clock_rate = { { 0 },
154 .clock_rate = { { 0 },
167 .clock_rate = { { 0 },
183 .clock_rate = { { 0 },
201 .clock_rate = { { 0 },
[all …]
H A Dcamss.h48 u32 clock_rate[CAMSS_RES_MAX][CAMSS_RES_MAX]; member
/linux/drivers/clocksource/
H A Dsamsung_pwm_timer.c263 unsigned long clock_rate; in samsung_clockevent_init() local
271 clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv); in samsung_clockevent_init()
272 pwm.clock_count_per_tick = clock_rate / HZ; in samsung_clockevent_init()
276 clock_rate, 1, pwm.tcnt_max); in samsung_clockevent_init()
334 unsigned long clock_rate; in samsung_clocksource_init() local
341 clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv); in samsung_clocksource_init()
352 pwm.variant.bits, clock_rate); in samsung_clocksource_init()
355 return clocksource_register_hz(&samsung_clocksource, clock_rate); in samsung_clocksource_init()
/linux/arch/sparc/kernel/
H A Dtime_32.c132 ce->mult = div_sc(sparc_config.clock_rate, NSEC_PER_SEC, in setup_timer_ce()
181 return clocksource_register_hz(&timer_cs, sparc_config.clock_rate); in setup_timer_cs()
228 ce->mult = div_sc(sparc_config.clock_rate, NSEC_PER_SEC, in register_percpu_ce()
230 ce->max_delta_ns = clockevent_delta2ns(sparc_config.clock_rate, ce); in register_percpu_ce()
231 ce->max_delta_ticks = (unsigned long)sparc_config.clock_rate; in register_percpu_ce()
H A Dirq.h66 int clock_rate; member
/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Dptp.c345 freq_adj = (ptp->clock_rate * ppb) / 1000000000ULL; in ptp_adjfine()
346 freq = neg_adj ? ptp->clock_rate + freq_adj : ptp->clock_rate - freq_adj; in ptp_adjfine()
349 comp = ((u64)1000000000ull << 32) / ptp->clock_rate; in ptp_adjfine()
385 ptp->clock_rate = sclk * 1000000; in ptp_start()
401 ptp->clock_rate = ext_clk_freq; in ptp_start()
422 clock_comp = ptp_calc_adjusted_comp(ptp->clock_rate); in ptp_start()
424 clock_comp = ((u64)1000000000ull << 32) / ptp->clock_rate; in ptp_start()
506 ptp->clock_period = NSEC_PER_SEC / ptp->clock_rate; in ptp_pps_on()
H A Dptp.h22 u32 clock_rate; member
/linux/include/uapi/linux/hdlc/
H A Dioctl.h41 unsigned int clock_rate; /* bits per second */ member
47 unsigned int clock_rate; /* bits per second */ member
/linux/drivers/char/hw_random/
H A Dcavium-rng-vf.c34 u64 clock_rate; member
110 cur_err = (cycles * 1000000000) / rng->clock_rate; /* In nanosec */ in check_rng_health()
197 rng->clock_rate = rng_get_coprocessor_clkrate(); in cavium_map_pf_regs()
H A Dstm32-rng.c266 unsigned long clock_rate = 0; in stm32_rng_clock_freq_restrain() local
269 clock_rate = clk_get_rate(priv->clk); in stm32_rng_clock_freq_restrain()
276 while ((clock_rate >> clock_div) > priv->data->max_clock_rate) in stm32_rng_clock_freq_restrain()
/linux/arch/arm/mach-omap1/
H A Dtimer32k.c84 #define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate) \ argument
85 (((nr_jiffies) * (clock_rate)) / HZ)
/linux/drivers/usb/dwc3/
H A Ddwc3-octeon.c422 u32 clock_rate; in dwc3_octeon_probe() local
424 if (of_property_read_u32(node, "refclk-frequency", &clock_rate)) { in dwc3_octeon_probe()
459 switch (clock_rate) { in dwc3_octeon_probe()
462 clock_rate); in dwc3_octeon_probe()
/linux/drivers/net/ethernet/cavium/common/
H A Dcavium_ptp.c122 comp = ((u64)1000000000ull << 32) / clock->clock_rate; in cavium_ptp_adjfine()
259 clock->clock_rate = ptp_cavium_clock_get(); in cavium_ptp_probe()
279 clock_comp = ((u64)1000000000ull << 32) / clock->clock_rate; in cavium_ptp_probe()
H A Dcavium_ptp.h21 u32 clock_rate; member
/linux/include/linux/mfd/
H A Dds1wm.h10 int clock_rate; member
/linux/drivers/media/i2c/
H A Dov4689.c134 u32 clock_rate; member
514 DIV_ROUND_UP(ov4689->clock_rate, 1000)); in ov4689_cal_delay()
921 &ov4689->clock_rate); in ov4689_probe()
923 ov4689->clock_rate = clk_get_rate(ov4689->xvclk); in ov4689_probe()
926 if (ov4689->clock_rate != OV4689_XVCLK_FREQ) { in ov4689_probe()
929 ov4689->clock_rate, OV4689_XVCLK_FREQ); in ov4689_probe()
/linux/drivers/iio/adc/
H A Dmeson_saradc.c317 unsigned long clock_rate; member
1018 ret = clk_set_rate(priv->adc_clk, priv->param->clock_rate); in meson_sar_adc_init()
1201 .clock_rate = 1150000,
1212 .clock_rate = 1150000,
1223 .clock_rate = 1200000,
1234 .clock_rate = 1200000,
1246 .clock_rate = 1200000,
1260 .clock_rate = 1200000,
/linux/sound/soc/tegra/
H A Dtegra210_i2s.c48 unsigned int clock_rate) in tegra210_i2s_set_clock_rate() argument
60 err = clk_set_rate(i2s->clk_i2s, clock_rate); in tegra210_i2s_set_clock_rate()
63 clock_rate, err); in tegra210_i2s_set_clock_rate()
73 err = clk_set_rate(i2s->clk_sync_input, clock_rate); in tegra210_i2s_set_clock_rate()
77 clock_rate, err); in tegra210_i2s_set_clock_rate()
/linux/drivers/video/fbdev/
H A Dgbefb.c444 int clock_rate; member
476 pixclock = (1000000 / gbe_pll->clock_rate) * in compute_gbe_timing()
486 gbe_pll->fvco_min / gbe_pll->clock_rate && in compute_gbe_timing()
488 gbe_pll->fvco_max / gbe_pll->clock_rate) { in compute_gbe_timing()
499 pixclock = (1000000 / gbe_pll->clock_rate) * in compute_gbe_timing()
509 timing->cfreq = gbe_pll->clock_rate * 1000 * timing->pll_m / in compute_gbe_timing()
/linux/drivers/net/wan/
H A Dixp4xx_hss.c278 unsigned int clock_type, clock_rate, loopback; member
1325 new_line.clock_rate = port->clock_rate; in hss_hdlc_ioctl()
1350 new_line.clock_rate, in hss_hdlc_ioctl()
1351 &port->clock_rate, &port->clock_reg); in hss_hdlc_ioctl()
1353 port->clock_rate = 0; in hss_hdlc_ioctl()
1503 port->clock_rate = 0; in ixp4xx_hss_probe()
H A Dhd64572.c364 if (port->settings.clock_rate > 0) { in sca_set_port()
371 tmc = CLOCK_BASE / brv / port->settings.clock_rate; in sca_set_port()
382 port->settings.clock_rate = CLOCK_BASE / brv / tmc; in sca_set_port()
386 port->settings.clock_rate = CLOCK_BASE / (256 * 512); in sca_set_port()
H A Dhd64570.c408 if (port->settings.clock_rate > 0) { in sca_set_port()
415 tmc = CLOCK_BASE / brv / port->settings.clock_rate; in sca_set_port()
426 port->settings.clock_rate = CLOCK_BASE / brv / tmc; in sca_set_port()
430 port->settings.clock_rate = CLOCK_BASE / (256 * 512); in sca_set_port()
/linux/drivers/mfd/
H A Ddb8500-prcmu.c1433 static unsigned long clock_rate(u8 clock) in clock_rate() function
1522 return pll_rate(PRCM_PLLDSI_FREQ, clock_rate(PRCMU_HDMICLK), in dsiclk_rate()
1535 return clock_rate(PRCMU_TVCLK) / max((u32)1, div); in dsiescclk_rate()
1541 return clock_rate(clock); in prcmu_clock_rate()
1556 return pll_rate(PRCM_PLLDSI_FREQ, clock_rate(PRCMU_HDMICLK), in prcmu_clock_rate()
1674 src_rate = clock_rate(PRCMU_HDMICLK); in round_plldsi_rate()
1710 src_rate = pll_rate(PRCM_PLLDSI_FREQ, clock_rate(PRCMU_HDMICLK), in round_dsiclk_rate()
1724 src_rate = clock_rate(PRCMU_TVCLK); in round_dsiescclk_rate()
1834 src_rate = clock_rate(PRCMU_HDMICLK); in set_plldsi_rate()
1879 clock_rate(PRCMU_HDMICLK), PLL_RAW), rate); in set_dsiclk_rate()
[all …]
/linux/drivers/input/rmi4/
H A Drmi_f54.c102 u16 clock_rate; member
642 f54->clock_rate = buf[3] | (buf[4] << 8); in rmi_f54_detect()
652 f54->clock_rate); in rmi_f54_detect()

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