Searched refs:closest_clk_lvl (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | dcn314_fpu.c | 187 unsigned int i, closest_clk_lvl; in dcn314_update_bw_bounding_box_fpu() local
217 for (closest_clk_lvl = 0, j = dcn3_14_soc.num_states - 1; j >= 0; j--) { in dcn314_update_bw_bounding_box_fpu()
219 closest_clk_lvl = j; in dcn314_update_bw_bounding_box_fpu()
225 closest_clk_lvl = dcn3_14_soc.num_states - 1; in dcn314_update_bw_bounding_box_fpu()
233 clock_limits[i].dcfclk_mhz < dcn3_14_soc.clock_limits[closest_clk_lvl].dcfclk_mhz) { in dcn314_update_bw_bounding_box_fpu()
235 clock_limits[i].dcfclk_mhz = dcn3_14_soc.clock_limits[closest_clk_lvl].dcfclk_mhz; in dcn314_update_bw_bounding_box_fpu()
245 dcn3_14_soc.clock_limits[closest_clk_lvl].dispclk_mhz; in dcn314_update_bw_bounding_box_fpu()
248 dcn3_14_soc.clock_limits[closest_clk_lvl].dppclk_mhz; in dcn314_update_bw_bounding_box_fpu()
251 clock_limits[i].dscclk_mhz = dcn3_14_soc.clock_limits[closest_clk_lvl].dscclk_mhz; in dcn314_update_bw_bounding_box_fpu()
252 clock_limits[i].dtbclk_mhz = dcn3_14_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn314_update_bw_bounding_box_fpu()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 594 unsigned int i, closest_clk_lvl; in dcn31_update_bw_bounding_box() local
621 closest_clk_lvl = j; in dcn31_update_bw_bounding_box()
637 dcn3_1_soc.clock_limits[closest_clk_lvl].dispclk_mhz; in dcn31_update_bw_bounding_box()
640 dcn3_1_soc.clock_limits[closest_clk_lvl].dppclk_mhz; in dcn31_update_bw_bounding_box()
647 dcn3_1_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; in dcn31_update_bw_bounding_box()
733 unsigned int i, closest_clk_lvl; in dcn316_update_bw_bounding_box() local
761 closest_clk_lvl = j; in dcn316_update_bw_bounding_box()
768 closest_clk_lvl = dcn3_16_soc.num_states - 1; in dcn316_update_bw_bounding_box()
780 dcn3_16_soc.clock_limits[closest_clk_lvl].dcfclk_mhz; in dcn316_update_bw_bounding_box()
789 dcn3_16_soc.clock_limits[closest_clk_lvl].dispclk_mhz; in dcn316_update_bw_bounding_box()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
| H A D | dcn35_fpu.c | 230 unsigned int i, closest_clk_lvl; in dcn35_update_bw_bounding_box_fpu() local
256 for (closest_clk_lvl = 0, j = dcn3_5_soc.num_states - 1; in dcn35_update_bw_bounding_box_fpu()
260 closest_clk_lvl = j; in dcn35_update_bw_bounding_box_fpu()
266 closest_clk_lvl = dcn3_5_soc.num_states - 1; in dcn35_update_bw_bounding_box_fpu()
275 dcn3_5_soc.clock_limits[closest_clk_lvl].dcfclk_mhz) { in dcn35_update_bw_bounding_box_fpu()
278 dcn3_5_soc.clock_limits[closest_clk_lvl].dcfclk_mhz; in dcn35_update_bw_bounding_box_fpu()
295 dcn3_5_soc.clock_limits[closest_clk_lvl].dispclk_mhz; in dcn35_update_bw_bounding_box_fpu()
299 dcn3_5_soc.clock_limits[closest_clk_lvl].dppclk_mhz; in dcn35_update_bw_bounding_box_fpu()
304 dcn3_5_soc.clock_limits[closest_clk_lvl].dscclk_mhz; in dcn35_update_bw_bounding_box_fpu()
306 dcn3_5_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn35_update_bw_bounding_box_fpu()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn351/ |
| H A D | dcn351_fpu.c | 264 unsigned int i, closest_clk_lvl; in dcn351_update_bw_bounding_box_fpu() local
290 for (closest_clk_lvl = 0, j = dcn3_51_soc.num_states - 1; in dcn351_update_bw_bounding_box_fpu()
294 closest_clk_lvl = j; in dcn351_update_bw_bounding_box_fpu()
300 closest_clk_lvl = dcn3_51_soc.num_states - 1; in dcn351_update_bw_bounding_box_fpu()
309 dcn3_51_soc.clock_limits[closest_clk_lvl].dcfclk_mhz) { in dcn351_update_bw_bounding_box_fpu()
312 dcn3_51_soc.clock_limits[closest_clk_lvl].dcfclk_mhz; in dcn351_update_bw_bounding_box_fpu()
329 dcn3_51_soc.clock_limits[closest_clk_lvl].dispclk_mhz; in dcn351_update_bw_bounding_box_fpu()
333 dcn3_51_soc.clock_limits[closest_clk_lvl].dppclk_mhz; in dcn351_update_bw_bounding_box_fpu()
338 dcn3_51_soc.clock_limits[closest_clk_lvl].dscclk_mhz; in dcn351_update_bw_bounding_box_fpu()
340 dcn3_51_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn351_update_bw_bounding_box_fpu()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| H A D | dcn301_fpu.c | 328 unsigned int i, closest_clk_lvl; in dcn301_update_bw_bounding_box() local
343 for (closest_clk_lvl = 0, j = dcn3_01_soc.num_states - 1; j >= 0; j--) { in dcn301_update_bw_bounding_box()
345 closest_clk_lvl = j; in dcn301_update_bw_bounding_box()
356 s[i].dispclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].dispclk_mhz; in dcn301_update_bw_bounding_box()
357 s[i].dppclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].dppclk_mhz; in dcn301_update_bw_bounding_box()
359 dcn3_01_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps; in dcn301_update_bw_bounding_box()
360 s[i].dscclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].dscclk_mhz; in dcn301_update_bw_bounding_box()
361 s[i].dtbclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn301_update_bw_bounding_box()
363 dcn3_01_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; in dcn301_update_bw_bounding_box()
364 s[i].phyclk_mhz = dcn3_01_soc.clock_limits[closest_clk_lvl].phyclk_mhz; in dcn301_update_bw_bounding_box()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 2405 unsigned int i, closest_clk_lvl = 0, k = 0; in dcn21_update_bw_bounding_box() local
2420 for (closest_clk_lvl = 0, j = dcn2_1_soc.num_states - 1; j >= 0; j--) { in dcn21_update_bw_bounding_box()
2422 closest_clk_lvl = j; in dcn21_update_bw_bounding_box()
2437 s[k].dispclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dispclk_mhz; in dcn21_update_bw_bounding_box()
2438 s[k].dppclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dppclk_mhz; in dcn21_update_bw_bounding_box()
2440 dcn2_1_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps; in dcn21_update_bw_bounding_box()
2441 s[k].dscclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dscclk_mhz; in dcn21_update_bw_bounding_box()
2442 s[k].dtbclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dtbclk_mhz; in dcn21_update_bw_bounding_box()
2443 s[k].phyclk_d18_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; in dcn21_update_bw_bounding_box()
2444 s[k].phyclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_mhz; in dcn21_update_bw_bounding_box()
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