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Searched refs:csr (Results 1 – 25 of 205) sorted by relevance

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/linux/drivers/crypto/intel/qat/qat_common/
H A Dadf_gen4_ras.c55 void __iomem *csr) in enable_ae_error_reporting() argument
76 void __iomem *csr) in enable_cpp_error_reporting() argument
168 void __iomem *csr) in enable_rf_error_reporting() argument
247 void __iomem *csr) in disable_ssm_error_reporting() argument
351 void __iomem *csr) in adf_gen4_process_errsou0() argument
781 void __iomem *csr) in adf_handle_spp_pulldata_err() argument
925 void __iomem *csr) in adf_handle_spp_pushdata_err() argument
1159 void __iomem *csr) in adf_handle_iaintstatssm() argument
1183 void __iomem *csr) in adf_handle_exprpssmcmpr() argument
1202 void __iomem *csr) in adf_handle_exprpssmxlt() argument
[all …]
H A Dicp_qat_hw_20_comp.h27 QAT_FIELD_SET(val32, csr.algo, in ICP_QAT_FW_COMP_20_BUILD_CONFIG_LOWER()
30 QAT_FIELD_SET(val32, csr.sd, in ICP_QAT_FW_COMP_20_BUILD_CONFIG_LOWER()
33 QAT_FIELD_SET(val32, csr.edmm, in ICP_QAT_FW_COMP_20_BUILD_CONFIG_LOWER()
36 QAT_FIELD_SET(val32, csr.hbs, in ICP_QAT_FW_COMP_20_BUILD_CONFIG_LOWER()
39 QAT_FIELD_SET(val32, csr.lllbd, in ICP_QAT_FW_COMP_20_BUILD_CONFIG_LOWER()
42 QAT_FIELD_SET(val32, csr.mmctrl, in ICP_QAT_FW_COMP_20_BUILD_CONFIG_LOWER()
96 QAT_FIELD_SET(val32, csr.lbms, in ICP_QAT_FW_COMP_20_BUILD_CONFIG_UPPER()
125 QAT_FIELD_SET(val32, csr.hbs, in ICP_QAT_FW_DECOMP_20_BUILD_CONFIG_LOWER()
137 QAT_FIELD_SET(val32, csr.lbc, in ICP_QAT_FW_DECOMP_20_BUILD_CONFIG_LOWER()
154 QAT_FIELD_SET(val32, csr.sdc, in ICP_QAT_FW_DECOMP_20_BUILD_CONFIG_UPPER()
[all …]
H A Dicp_qat_hal.h125 #define SET_CAP_CSR(handle, csr, val) \ argument
126 ADF_CSR_WR((handle)->hal_cap_g_ctl_csr_addr_v, csr, val)
127 #define GET_CAP_CSR(handle, csr) \ argument
128 ADF_CSR_RD((handle)->hal_cap_g_ctl_csr_addr_v, csr)
131 #define AE_CSR_ADDR(handle, ae, csr) (AE_CSR(handle, ae) + (0x3ff & (csr))) argument
132 #define SET_AE_CSR(handle, ae, csr, val) \ argument
133 ADF_CSR_WR(AE_CSR_ADDR(handle, ae, csr), 0, val)
134 #define GET_AE_CSR(handle, ae, csr) ADF_CSR_RD(AE_CSR_ADDR(handle, ae, csr), 0) argument
H A Dadf_hw_arbiter.c21 void __iomem *csr = accel_dev->transport->banks[0].csr_addr; in adf_init_arb() local
36 WRITE_CSR_ARB_SARCONFIG(csr, arb_off, arb, arb_cfg); in adf_init_arb()
42 WRITE_CSR_ARB_WT2SAM(csr, arb_off, wt_off, i, thd_2_arb_cfg[i]); in adf_init_arb()
79 void __iomem *csr; in adf_exit_arb() local
89 csr = accel_dev->transport->banks[0].csr_addr; in adf_exit_arb()
95 WRITE_CSR_ARB_SARCONFIG(csr, arb_off, i, 0); in adf_exit_arb()
99 WRITE_CSR_ARB_WT2SAM(csr, arb_off, wt_off, i, 0); in adf_exit_arb()
103 csr_ops->write_csr_ring_srv_arb_en(csr, i, 0); in adf_exit_arb()
109 void __iomem *csr = accel_dev->transport->banks[0].csr_addr; in adf_disable_arb_thd() local
127 WRITE_CSR_ARB_WT2SAM(csr, info.arb_offset, info.wt2sam_offset, ae, in adf_disable_arb_thd()
/linux/arch/alpha/kernel/
H A Dcore_tsunami.c181 volatile unsigned long *csr; in tsunami_pci_tbi() local
186 csr = &pchip->tlbia.csr; in tsunami_pci_tbi()
188 csr = &pchip->tlbiv.csr; in tsunami_pci_tbi()
194 *csr = value; in tsunami_pci_tbi()
196 *csr; in tsunami_pci_tbi()
345 pchip->tba[2].csr = 0; in tsunami_init_one_pchip()
347 pchip->wsba[3].csr = 0; in tsunami_init_one_pchip()
350 pchip->pctl.csr |= pctl_m_mwin; in tsunami_init_one_pchip()
455 pchip->perror.csr; in tsunami_pci_clr_err_1()
456 pchip->perror.csr = 0x040; in tsunami_pci_clr_err_1()
[all …]
H A Dcore_wildfire.c127 pci->pci_window[1].tbase.csr = 0; in wildfire_init_hose()
193 temp = fast->qsd_whami.csr; in wildfire_hardware_probe()
220 temp = qsa->qsa_qbb_id.csr; in wildfire_hardware_probe()
254 temp = qsd->qsd_whami.csr; in wildfire_hardware_probe()
263 temp = qsa->qsa_qbb_pop[0].csr; in wildfire_hardware_probe()
270 temp = qsa->qsa_qbb_pop[1].csr; in wildfire_hardware_probe()
277 temp = qsa->qsa_qbb_id.csr; in wildfire_hardware_probe()
538 qsd->qsd_fault_ena.csr); in wildfire_dump_qsd_regs()
542 qsd->qsd_mem_config.csr); in wildfire_dump_qsd_regs()
544 qsd->qsd_err_sum.csr); in wildfire_dump_qsd_regs()
[all …]
H A Dcore_titan.c207 volatile unsigned long *csr; in titan_pci_tbi() local
220 csr = &port->port_specific.g.gtlbia.csr; in titan_pci_tbi()
222 csr = &port->port_specific.g.gtlbiv.csr; in titan_pci_tbi()
229 *csr = value; in titan_pci_tbi()
231 *csr; in titan_pci_tbi()
240 pctl.pctl_q_whole = port->pctl.csr; in titan_query_agp()
332 port->tba[1].csr = 0; in titan_init_one_pachip_port()
338 port->wsba[3].csr = 0; in titan_init_one_pachip_port()
341 port->pctl.csr |= pctl_m_mwin; in titan_init_one_pachip_port()
645 pctl.pctl_q_whole = port->pctl.csr; in titan_agp_configure()
[all …]
H A Dsys_marvel.c174 volatile unsigned long *csr, in io7_redirect_irq() argument
179 val = *csr; in io7_redirect_irq()
183 *csr = val; in io7_redirect_irq()
185 *csr; in io7_redirect_irq()
196 val = io7->csrs->PO7_LSI_CTL[which].csr; in io7_redirect_one_lsi()
200 io7->csrs->PO7_LSI_CTL[which].csr = val; in io7_redirect_one_lsi()
202 io7->csrs->PO7_LSI_CTL[which].csr; in io7_redirect_one_lsi()
213 val = io7->csrs->PO7_MSI_CTL[which].csr; in io7_redirect_one_msi()
219 io7->csrs->PO7_MSI_CTL[which].csr; in io7_redirect_one_msi()
230 io7->csrs->PO7_LSI_CTL[which].csr; in init_one_io7_lsi()
[all …]
/linux/arch/sparc/kernel/
H A Debus.c74 u32 csr = 0; in ebus_dma_irq() local
99 u32 csr; in ebus_dma_register() local
116 csr |= EBDMA_CSR_TCI_DIS; in ebus_dma_register()
127 u32 csr; in ebus_dma_irq_enable() local
137 csr |= EBDMA_CSR_INT_EN; in ebus_dma_irq_enable()
159 u32 csr; in ebus_dma_unregister() local
179 u32 csr; in ebus_dma_request() local
208 u32 csr; in ebus_dma_prepare() local
213 csr = (EBDMA_CSR_INT_EN | in ebus_dma_prepare()
219 csr |= EBDMA_CSR_WRITE; in ebus_dma_prepare()
[all …]
/linux/arch/loongarch/kvm/
H A Dvcpu.c266 struct loongarch_csrs *csr = vcpu->arch.csr; in kvm_set_cpuid() local
317 struct loongarch_csrs *csr = vcpu->arch.csr; in kvm_drop_cpuid() local
351 struct loongarch_csrs *csr = vcpu->arch.csr; in _kvm_getcsr() local
375 struct loongarch_csrs *csr = vcpu->arch.csr; in _kvm_setcsr() local
394 kvm_write_sw_gcsr(csr, id, val); in _kvm_setcsr()
994 struct loongarch_csrs *csr; in kvm_arch_vcpu_create() local
1004 if (!vcpu->arch.csr) in kvm_arch_vcpu_create()
1023 csr = vcpu->arch.csr; in kvm_arch_vcpu_create()
1048 kfree(vcpu->arch.csr); in kvm_arch_vcpu_destroy()
1065 struct loongarch_csrs *csr = vcpu->arch.csr; in _kvm_vcpu_load() local
[all …]
H A Dtimer.c57 struct loongarch_csrs *csr = vcpu->arch.csr; in kvm_restore_timer() local
64 cfg = kvm_read_sw_gcsr(csr, LOONGARCH_CSR_TCFG); in kvm_restore_timer()
67 kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_ESTAT); in kvm_restore_timer()
68 kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_TCFG); in kvm_restore_timer()
71 kvm_restore_hw_gcsr(csr, LOONGARCH_CSR_TVAL); in kvm_restore_timer()
142 struct loongarch_csrs *csr = vcpu->arch.csr; in _kvm_save_timer() local
144 cfg = kvm_read_sw_gcsr(csr, LOONGARCH_CSR_TCFG); in _kvm_save_timer()
177 struct loongarch_csrs *csr = vcpu->arch.csr; in kvm_save_timer() local
182 kvm_save_hw_gcsr(csr, LOONGARCH_CSR_TCFG); in kvm_save_timer()
183 kvm_save_hw_gcsr(csr, LOONGARCH_CSR_TVAL); in kvm_save_timer()
[all …]
/linux/drivers/crypto/starfive/
H A Djh7110-rsa.c83 rctx->csr.pka.v = 0; in starfive_rsa_montgomery_form()
91 rctx->csr.pka.v = 0; in starfive_rsa_montgomery_form()
98 rctx->csr.pka.ie = 1; in starfive_rsa_montgomery_form()
113 rctx->csr.pka.v = 0; in starfive_rsa_montgomery_form()
119 rctx->csr.pka.ie = 1; in starfive_rsa_montgomery_form()
126 rctx->csr.pka.v = 0; in starfive_rsa_montgomery_form()
133 rctx->csr.pka.ie = 1; in starfive_rsa_montgomery_form()
147 rctx->csr.pka.v = 0; in starfive_rsa_montgomery_form()
153 rctx->csr.pka.ie = 1; in starfive_rsa_montgomery_form()
200 rctx->csr.pka.v = 0; in starfive_rsa_cpu_start()
[all …]
/linux/drivers/usb/musb/
H A Dmusb_gadget.c229 u16 fifo_count = 0, csr; in txstate() local
268 csr); in txstate()
388 csr |= MUSB_TXCSR_TXPKTRDY; in txstate()
408 u16 csr; in musb_g_tx() local
792 u16 csr; in musb_g_rx() local
918 u16 csr; in musb_gadget_enable() local
1002 csr |= MUSB_TXCSR_P_ISO; in musb_gadget_enable()
1042 csr |= MUSB_RXCSR_P_ISO; in musb_gadget_enable()
1044 csr |= MUSB_RXCSR_DISNYET; in musb_gadget_enable()
1327 u16 csr; in musb_gadget_set_halt() local
[all …]
H A Dmusb_gadget_ep0.c243 u16 csr; in service_zero_data_request() local
403 u16 csr; in service_zero_data_request() local
465 u16 count, csr; in ep0_rxstate() local
490 csr |= MUSB_CSR0_P_DATAEND; in ep0_rxstate()
501 musb->ackpend = csr; in ep0_rxstate()
546 csr |= MUSB_CSR0_P_DATAEND; in ep0_txstate()
556 musb->ackpend = csr; in ep0_txstate()
643 u16 csr; in musb_g_ep0_irq() local
843 handled, csr, in musb_g_ep0_irq()
997 u16 csr; in musb_g_ep0_halt() local
[all …]
H A Dmusb_host.c90 u16 csr; in musb_h_tx_flush_fifo() local
124 u16 csr; in musb_h_ep0_flush_fifo() local
417 u16 csr; in musb_host_packet_rx() local
517 u16 csr; in musb_rx_reinit() local
579 u16 csr; in musb_tx_dma_set_mode_mentor() local
652 u16 csr; in musb_tx_dma_program() local
682 u16 csr; in musb_ep_program() local
721 u16 csr; in musb_ep_program() local
840 u16 csr = 0; in musb_ep_program() local
1057 u16 csr, len; in musb_h_ep0_irq() local
[all …]
H A Dmusb_cppi41.c56 u16 csr; in save_rx_toggle() local
74 u16 csr; in update_rx_toggle() local
105 u16 csr; in musb_is_tx_fifo_empty() local
108 csr = musb_readw(epio, MUSB_TXCSR); in musb_is_tx_fifo_empty()
109 if (csr & MUSB_TXCSR_TXPKTRDY) in musb_is_tx_fifo_empty()
122 u16 csr; in cppi41_trans_done() local
179 csr |= MUSB_RXCSR_H_REQPKT; in cppi41_trans_done()
582 u16 csr; in cppi41_dma_channel_abort() local
593 csr &= ~MUSB_TXCSR_DMAENAB; in cppi41_dma_channel_abort()
610 csr |= MUSB_RXCSR_FLUSHFIFO; in cppi41_dma_channel_abort()
[all …]
/linux/drivers/watchdog/
H A Dshwdt.c85 u8 csr; in sh_wdt_start() local
97 sh_wdt_write_csr(csr); in sh_wdt_start()
110 csr |= WTCSR_TME; in sh_wdt_start()
111 csr &= ~WTCSR_RSTS; in sh_wdt_start()
112 sh_wdt_write_csr(csr); in sh_wdt_start()
116 csr &= ~RSTCSR_RSTS; in sh_wdt_start()
128 u8 csr; in sh_wdt_stop() local
135 csr &= ~WTCSR_TME; in sh_wdt_stop()
136 sh_wdt_write_csr(csr); in sh_wdt_stop()
181 u8 csr; in sh_wdt_ping() local
[all …]
/linux/drivers/scsi/
H A Dsun3_scsi.c196 unsigned short csr = dregs->csr; in scsi_sun3_intr() local
203 if(csr & ~CSR_GOOD) { in scsi_sun3_intr()
243 dregs->csr |= CSR_FIFO; in sun3scsi_dma_setup()
270 dregs->csr |= CSR_FIFO; in sun3scsi_dma_setup()
348 unsigned short csr; in sun3scsi_dma_start() local
350 csr = dregs->csr; in sun3scsi_dma_start()
474 dregs->csr |= CSR_FIFO; in sun3scsi_dma_finish()
549 oldcsr = dregs->csr; in sun3_scsi_probe()
550 dregs->csr = 0; in sun3_scsi_probe()
555 dregs->csr = oldcsr; in sun3_scsi_probe()
[all …]
/linux/arch/sh/kernel/cpu/
H A Dadc.c16 unsigned char csr; in adc_single() local
22 csr = __raw_readb(ADCSR); in adc_single()
23 csr = channel | ADCSR_ADST | ADCSR_CKS; in adc_single()
24 __raw_writeb(csr, ADCSR); in adc_single()
27 csr = __raw_readb(ADCSR); in adc_single()
28 } while ((csr & ADCSR_ADF) == 0); in adc_single()
30 csr &= ~(ADCSR_ADF | ADCSR_ADST); in adc_single()
31 __raw_writeb(csr, ADCSR); in adc_single()
/linux/drivers/usb/gadget/udc/
H A Dat91_udc.c111 u32 csr; in proc_ep_show() local
132 csr, in proc_ep_show()
139 (!(csr & 0x700)) in proc_ep_show()
314 u32 csr; in read_fifo() local
341 csr |= CLR_FX; in read_fifo()
407 csr |= CLR_FX; in write_fifo()
441 csr &= ~SET_FX; in write_fifo()
741 u32 csr; in at91_ep_set_halt() local
761 csr |= CLR_FX; in at91_ep_set_halt()
1073 csr |= CLR_FX; in handle_setup()
[all …]
/linux/sound/soc/intel/atom/sst/
H A Dsst_loader.c56 union config_status_reg_mrfld csr; in intel_sst_reset_dsp_mrfld() local
61 dev_dbg(sst_drv_ctx->dev, "value:0x%llx\n", csr.full); in intel_sst_reset_dsp_mrfld()
63 csr.full |= 0x7; in intel_sst_reset_dsp_mrfld()
67 dev_dbg(sst_drv_ctx->dev, "value:0x%llx\n", csr.full); in intel_sst_reset_dsp_mrfld()
69 csr.full &= ~(0x1); in intel_sst_reset_dsp_mrfld()
73 dev_dbg(sst_drv_ctx->dev, "value:0x%llx\n", csr.full); in intel_sst_reset_dsp_mrfld()
85 union config_status_reg_mrfld csr; in sst_start_mrfld() local
91 csr.full |= 0x7; in sst_start_mrfld()
97 csr.part.xt_snoop = 1; in sst_start_mrfld()
98 csr.full &= ~(0x5); in sst_start_mrfld()
[all …]
/linux/arch/riscv/kvm/
H A Daia.c81 csr->hviph &= ~mask; in kvm_riscv_vcpu_aia_flush_interrupts()
82 csr->hviph |= val; in kvm_riscv_vcpu_aia_flush_interrupts()
91 csr->vsieh = csr_read(CSR_VSIEH); in kvm_riscv_vcpu_aia_sync_interrupts()
144 csr_write(CSR_HVIPRIO1, csr->hviprio1); in kvm_riscv_vcpu_aia_load()
145 csr_write(CSR_HVIPRIO2, csr->hviprio2); in kvm_riscv_vcpu_aia_load()
147 csr_write(CSR_VSIEH, csr->vsieh); in kvm_riscv_vcpu_aia_load()
148 csr_write(CSR_HVIPH, csr->hviph); in kvm_riscv_vcpu_aia_load()
162 csr->hviprio1 = csr_read(CSR_HVIPRIO1); in kvm_riscv_vcpu_aia_put()
163 csr->hviprio2 = csr_read(CSR_HVIPRIO2); in kvm_riscv_vcpu_aia_put()
165 csr->vsieh = csr_read(CSR_VSIEH); in kvm_riscv_vcpu_aia_put()
[all …]
H A Dvcpu.c65 memcpy(csr, reset_csr, sizeof(*csr)); in kvm_riscv_reset_vcpu()
345 csr->hvip &= ~mask; in kvm_riscv_vcpu_flush_interrupts()
346 csr->hvip |= val; in kvm_riscv_vcpu_flush_interrupts()
360 csr->vsie = csr_read(CSR_VSIE); in kvm_riscv_vcpu_sync_interrupts()
564 csr_write(CSR_VSIE, csr->vsie); in kvm_arch_vcpu_load()
567 csr_write(CSR_VSEPC, csr->vsepc); in kvm_arch_vcpu_load()
571 csr_write(CSR_HVIP, csr->hvip); in kvm_arch_vcpu_load()
572 csr_write(CSR_VSATP, csr->vsatp); in kvm_arch_vcpu_load()
618 csr->vsie = csr_read(CSR_VSIE); in kvm_arch_vcpu_put()
624 csr->hvip = csr_read(CSR_HVIP); in kvm_arch_vcpu_put()
[all …]
/linux/arch/loongarch/include/asm/
H A Dkvm_csr.h14 #define gcsr_read(csr) \ argument
20 : [reg] "i" (csr) \
25 #define gcsr_write(v, csr) \ argument
31 : [reg] "i" (csr) \
35 #define gcsr_xchg(v, m, csr) \ argument
181 #define kvm_save_hw_gcsr(csr, gid) (csr->csrs[gid] = gcsr_read(gid)) argument
182 #define kvm_restore_hw_gcsr(csr, gid) (gcsr_write(csr->csrs[gid], gid)) argument
188 return csr->csrs[gid]; in kvm_read_sw_gcsr()
193 csr->csrs[gid] = val; in kvm_write_sw_gcsr()
199 csr->csrs[gid] |= val; in kvm_set_sw_gcsr()
[all …]
/linux/drivers/dma/
H A Dtegra186-gpc-dma.c189 u32 csr; member
452 u32 csr, status; in tegra_dma_disable() local
460 csr &= ~TEGRA_GPCDMA_CSR_ENB; in tegra_dma_disable()
663 u32 status, csr; in tegra_dma_stop_client() local
832 u32 *csr, in get_transfer_param() argument
866 u32 csr, mc_seq; in tegra_dma_prep_dma_memset() local
916 sg_req[0].ch_regs.csr = csr; in tegra_dma_prep_dma_memset()
933 u32 csr, mc_seq; in tegra_dma_prep_dma_memcpy() local
986 sg_req[0].ch_regs.csr = csr; in tegra_dma_prep_dma_memcpy()
1105 sg_req[i].ch_regs.csr = csr; in tegra_dma_prep_slave_sg()
[all …]

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