| H A D | adma.c | 265 desc->dst_cnt = 1; in ppc440spe_desc_init_null_xor()
279 desc->dst_cnt = 1; in ppc440spe_desc_init_xor()
292 int dst_cnt, int src_cnt, unsigned long flags) in ppc440spe_desc_init_dma2pq() argument
299 desc->dst_cnt = dst_cnt; in ppc440spe_desc_init_dma2pq()
318 int dst_cnt, int src_cnt, unsigned long flags, in ppc440spe_desc_init_dma01pq() argument
328 desc->dst_cnt = dst_cnt; in ppc440spe_desc_init_dma01pq()
333 dopc = (desc->dst_cnt == DMA_DEST_MAX_NUM) ? in ppc440spe_desc_init_dma01pq()
404 if (desc->dst_cnt in ppc440spe_desc_init_dma01pq()
432 ppc440spe_desc_init_dma01pqzero_sum(struct ppc440spe_adma_desc_slot * desc,int dst_cnt,int src_cnt) ppc440spe_desc_init_dma01pqzero_sum() argument
1327 ppc440spe_adma_estimate(struct dma_chan * chan,enum dma_transaction_type cap,struct page ** dst_lst,int dst_cnt,struct page ** src_lst,int src_cnt,size_t src_sz) ppc440spe_adma_estimate() argument
1369 ppc440spe_async_tx_find_best_channel(enum dma_transaction_type cap,struct page ** dst_lst,int dst_cnt,struct page ** src_lst,int src_cnt,size_t src_sz) ppc440spe_async_tx_find_best_channel() argument
2085 ppc440spe_dma01_prep_mult(struct ppc440spe_adma_chan * ppc440spe_chan,dma_addr_t * dst,int dst_cnt,dma_addr_t * src,int src_cnt,const unsigned char * scf,size_t len,unsigned long flags) ppc440spe_dma01_prep_mult() argument
2275 ppc440spe_dma01_prep_pq(struct ppc440spe_adma_chan * ppc440spe_chan,dma_addr_t * dst,int dst_cnt,dma_addr_t * src,int src_cnt,const unsigned char * scf,size_t len,unsigned long flags) ppc440spe_dma01_prep_pq() argument
2420 ppc440spe_dma2_prep_pq(struct ppc440spe_adma_chan * ppc440spe_chan,dma_addr_t * dst,int dst_cnt,dma_addr_t * src,int src_cnt,const unsigned char * scf,size_t len,unsigned long flags) ppc440spe_dma2_prep_pq() argument
2514 int dst_cnt = 0; ppc440spe_adma_prep_dma_pq() local
2591 int slot_cnt, slots_per_op, idst, dst_cnt; ppc440spe_adma_prep_dma_pqzero_sum() local
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