/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | vcn_v4_0_3.c | 58 int inst_idx, bool indirect); 401 * @indirect: indirectly write sram 405 static void vcn_v4_0_3_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v4_0_3_mc_resume_dpg_mode() argument 415 if (!indirect) { in vcn_v4_0_3_mc_resume_dpg_mode() 419 inst_idx].tmr_mc_addr_lo), 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode() 423 inst_idx].tmr_mc_addr_hi), 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode() 425 VCN, 0, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode() 428 VCN, 0, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode() 430 VCN, 0, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode() 432 VCN, 0, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode() 614 vcn_v4_0_3_disable_clock_gating_dpg_mode(struct amdgpu_device * adev,uint8_t sram_sel,int inst_idx,uint8_t indirect) vcn_v4_0_3_disable_clock_gating_dpg_mode() argument 714 vcn_v4_0_3_start_dpg_mode(struct amdgpu_device * adev,int inst_idx,bool indirect) vcn_v4_0_3_start_dpg_mode() argument 1748 vcn_v4_0_3_enable_ras(struct amdgpu_device * adev,int inst_idx,bool indirect) vcn_v4_0_3_enable_ras() argument [all...] |
H A D | vcn_v5_0_0.c | 346 * @indirect: indirectly write sram 350 static void vcn_v5_0_0_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v5_0_0_mc_resume_dpg_mode() 360 if (!indirect) { in vcn_v5_0_0_mc_resume_dpg_mode() 363 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_lo), 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode() 366 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_hi), 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode() 368 VCN, inst_idx, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode() 371 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode() 373 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode() 375 VCN, inst_idx, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode() 381 lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v5_0_0_mc_resume_dpg_mode() 349 vcn_v5_0_0_mc_resume_dpg_mode(struct amdgpu_device * adev,int inst_idx,bool indirect) vcn_v5_0_0_mc_resume_dpg_mode() argument 616 vcn_v5_0_0_start_dpg_mode(struct amdgpu_device * adev,int inst_idx,bool indirect) vcn_v5_0_0_start_dpg_mode() argument [all...] |
H A D | vcn_v4_0_5.c | 385 * @indirect: indirectly write sram 389 static void vcn_v4_0_5_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v4_0_5_mc_resume_dpg_mode() 399 if (!indirect) { in vcn_v4_0_5_mc_resume_dpg_mode() 403 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode() 407 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode() 409 VCN, inst_idx, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode() 412 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode() 414 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode() 416 VCN, inst_idx, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode() 422 lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v4_0_5_mc_resume_dpg_mode() 388 vcn_v4_0_5_mc_resume_dpg_mode(struct amdgpu_device * adev,int inst_idx,bool indirect) vcn_v4_0_5_mc_resume_dpg_mode() argument 716 vcn_v4_0_5_disable_clock_gating_dpg_mode(struct amdgpu_device * adev,uint8_t sram_sel,int inst_idx,uint8_t indirect) vcn_v4_0_5_disable_clock_gating_dpg_mode() argument 830 vcn_v4_0_5_start_dpg_mode(struct amdgpu_device * adev,int inst_idx,bool indirect) vcn_v4_0_5_start_dpg_mode() argument [all...] |
H A D | vcn_v2_5.c | 472 static void vcn_v2_5_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v2_5_mc_resume_dpg_mode() argument 479 if (!indirect) { in vcn_v2_5_mc_resume_dpg_mode() 482 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_lo), 0, indirect); in vcn_v2_5_mc_resume_dpg_mode() 485 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_hi), 0, indirect); in vcn_v2_5_mc_resume_dpg_mode() 487 VCN, 0, mmUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode() 490 VCN, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode() 492 VCN, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode() 494 VCN, 0, mmUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode() 500 lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v2_5_mc_resume_dpg_mode() 503 upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v2_5_mc_resume_dpg_mode() 686 vcn_v2_5_clock_gating_dpg_mode(struct amdgpu_device * adev,uint8_t sram_sel,int inst_idx,uint8_t indirect) vcn_v2_5_clock_gating_dpg_mode() argument 796 vcn_v2_6_enable_ras(struct amdgpu_device * adev,int inst_idx,bool indirect) vcn_v2_6_enable_ras() argument 822 vcn_v2_5_start_dpg_mode(struct amdgpu_device * adev,int inst_idx,bool indirect) vcn_v2_5_start_dpg_mode() argument [all...] |
H A D | vcn_v4_0.c | 438 * @indirect: indirectly write sram 442 static void vcn_v4_0_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v4_0_mc_resume_dpg_mode() 451 if (!indirect) { in vcn_v4_0_mc_resume_dpg_mode() 454 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_lo), 0, indirect); in vcn_v4_0_mc_resume_dpg_mode() 457 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_hi), 0, indirect); in vcn_v4_0_mc_resume_dpg_mode() 459 VCN, inst_idx, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v4_0_mc_resume_dpg_mode() 462 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect); in vcn_v4_0_mc_resume_dpg_mode() 464 VCN, inst_idx, regUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v4_0_mc_resume_dpg_mode() 466 VCN, inst_idx, regUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v4_0_mc_resume_dpg_mode() 472 lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v4_0_mc_resume_dpg_mode() 441 vcn_v4_0_mc_resume_dpg_mode(struct amdgpu_device * adev,int inst_idx,bool indirect) vcn_v4_0_mc_resume_dpg_mode() argument 781 vcn_v4_0_disable_clock_gating_dpg_mode(struct amdgpu_device * adev,uint8_t sram_sel,int inst_idx,uint8_t indirect) vcn_v4_0_disable_clock_gating_dpg_mode() argument 887 vcn_v4_0_enable_ras(struct amdgpu_device * adev,int inst_idx,bool indirect) vcn_v4_0_enable_ras() argument 917 vcn_v4_0_start_dpg_mode(struct amdgpu_device * adev,int inst_idx,bool indirect) vcn_v4_0_start_dpg_mode() argument [all...] |
H A D | vcn_v2_0.c | 387 static void vcn_v2_0_mc_resume_dpg_mode(struct amdgpu_device *adev, bool indirect) in vcn_v2_0_mc_resume_dpg_mode() argument 394 if (!indirect) { in vcn_v2_0_mc_resume_dpg_mode() 397 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].tmr_mc_addr_lo), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode() 400 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN].tmr_mc_addr_hi), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode() 402 UVD, 0, mmUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode() 405 UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode() 407 UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode() 409 UVD, 0, mmUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v2_0_mc_resume_dpg_mode() 415 lower_32_bits(adev->vcn.inst->gpu_addr), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode() 418 upper_32_bits(adev->vcn.inst->gpu_addr), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode() 596 vcn_v2_0_clock_gating_dpg_mode(struct amdgpu_device * adev,uint8_t sram_sel,uint8_t indirect) vcn_v2_0_clock_gating_dpg_mode() argument 795 vcn_v2_0_start_dpg_mode(struct amdgpu_device * adev,bool indirect) vcn_v2_0_start_dpg_mode() argument [all...] |
H A D | vcn_v3_0.c | 501 static void vcn_v3_0_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in vcn_v3_0_mc_resume_dpg_mode() 508 if (!indirect) { in vcn_v3_0_mc_resume_dpg_mode() 511 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_lo), 0, indirect); in vcn_v3_0_mc_resume_dpg_mode() 514 (adev->firmware.ucode[AMDGPU_UCODE_ID_VCN + inst_idx].tmr_mc_addr_hi), 0, indirect); in vcn_v3_0_mc_resume_dpg_mode() 516 VCN, inst_idx, mmUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v3_0_mc_resume_dpg_mode() 519 VCN, inst_idx, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW), 0, 0, indirect); in vcn_v3_0_mc_resume_dpg_mode() 521 VCN, inst_idx, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH), 0, 0, indirect); in vcn_v3_0_mc_resume_dpg_mode() 523 VCN, inst_idx, mmUVD_VCPU_CACHE_OFFSET0), 0, 0, indirect); in vcn_v3_0_mc_resume_dpg_mode() 529 lower_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v3_0_mc_resume_dpg_mode() 532 upper_32_bits(adev->vcn.inst[inst_idx].gpu_addr), 0, indirect); in vcn_v3_0_mc_resume_dpg_mode() 500 vcn_v3_0_mc_resume_dpg_mode(struct amdgpu_device * adev,int inst_idx,bool indirect) vcn_v3_0_mc_resume_dpg_mode() argument 829 vcn_v3_0_clock_gating_dpg_mode(struct amdgpu_device * adev,uint8_t sram_sel,int inst_idx,uint8_t indirect) vcn_v3_0_clock_gating_dpg_mode() argument 944 vcn_v3_0_start_dpg_mode(struct amdgpu_device * adev,int inst_idx,bool indirect) vcn_v3_0_start_dpg_mode() argument [all...] |
H A D | amdgpu_jpeg.h | 35 #define WREG32_SOC15_JPEG_DPG_MODE(inst_idx, offset, value, indirect) \ argument 37 if (!indirect) { \ 45 indirect << UVD_DPG_LMA_CTL__SRAM_SEL__SHIFT)); \
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H A D | jpeg_v4_0_5.c | 332 int inst_idx, uint8_t indirect) in jpeg_engine_4_0_5_dpg_clock_gating_mode() argument 343 WREG32_SOC15_JPEG_DPG_MODE(inst_idx, regJPEG_CGC_CTRL_INTERNAL_OFFSET, data, indirect); in jpeg_engine_4_0_5_dpg_clock_gating_mode() 347 data, indirect); in jpeg_engine_4_0_5_dpg_clock_gating_mode() 393 * @indirect: indirectly write sram 397 static void jpeg_v4_0_5_start_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect) in jpeg_v4_0_5_start_dpg_mode() argument 420 if (indirect) in jpeg_v4_0_5_start_dpg_mode() 424 jpeg_engine_4_0_5_dpg_clock_gating_mode(adev, inst_idx, indirect); in jpeg_v4_0_5_start_dpg_mode() 428 adev->gfx.config.gb_addr_config, indirect); in jpeg_v4_0_5_start_dpg_mode() 431 JPEG_SYS_INT_EN__DJRBC_MASK, indirect); in jpeg_v4_0_5_start_dpg_mode() 434 WREG32_SOC15_JPEG_DPG_MODE(inst_idx, regUVD_NO_OP_INTERNAL_OFFSET, 0, indirect); in jpeg_v4_0_5_start_dpg_mode() [all...] |
/linux/arch/x86/kernel/ |
H A D | ksysfs.c | 95 struct setup_indirect *indirect; in get_setup_data_size() local 116 if (indirect->type != SETUP_INDIRECT) in get_setup_data_size() 117 *size = indirect->len; in get_setup_data_size() 138 struct setup_indirect *indirect; in type_show() local 162 indirect = (struct setup_indirect *)data->data; in type_show() 164 ret = sprintf(buf, "0x%x\n", indirect->type); in type_show() 179 struct setup_indirect *indirect; in setup_data_data_read() local 203 indirect = (struct setup_indirect *)data->data; in setup_data_data_read() 205 if (indirect->type != SETUP_INDIRECT) { in setup_data_data_read() 206 paddr = indirect->addr; in setup_data_data_read() [all …]
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H A D | kdebugfs.c | 91 struct setup_indirect *indirect; in create_setup_data_nodes() local 129 indirect = (struct setup_indirect *)data->data; in create_setup_data_nodes() 131 if (indirect->type != SETUP_INDIRECT) { in create_setup_data_nodes() 132 node->paddr = indirect->addr; in create_setup_data_nodes() 133 node->type = indirect->type; in create_setup_data_nodes() 134 node->len = indirect->len; in create_setup_data_nodes()
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/linux/Documentation/filesystems/ext4/ |
H A D | blockmap.rst | 16 | 13 | Double-indirect block: (file blocks ``$block_size``/4 + 12 to (``$block_siz… 21 | | | 0 to (``$block_size`` / 4) | Map to (``$block_size`` / 4) indirect bl… 30 | 14 | Triple-indirect block: (file blocks (``$block_size`` / 4) ^ 2 + (``$block_s… 35 … | 0 to (``$block_size`` / 4) | Map to (``$block_size`` / 4) double indirect blocks (1024 if 4… 40 … | | 0 to (``$block_size`` / 4) | Map to (``$block_size`` / 4) indirect blocks (1024 if 4…
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/linux/drivers/net/ethernet/intel/idpf/ |
H A D | idpf_controlq.c | 80 desc->params.indirect.addr_high = in idpf_ctlq_init_rxq_bufs() 82 desc->params.indirect.addr_low = in idpf_ctlq_init_rxq_bufs() 84 desc->params.indirect.param0 = 0; in idpf_ctlq_init_rxq_bufs() 85 desc->params.indirect.sw_cookie = 0; in idpf_ctlq_init_rxq_bufs() 86 desc->params.indirect.v_flags = 0; in idpf_ctlq_init_rxq_bufs() 307 desc->params.indirect.addr_high = in idpf_ctlq_send() 309 desc->params.indirect.addr_low = in idpf_ctlq_send() 312 memcpy(&desc->params, msg->ctx.indirect.context, in idpf_ctlq_send() 497 desc->params.indirect.addr_high = in idpf_ctlq_post_rx_buffs() 499 desc->params.indirect.addr_low = in idpf_ctlq_post_rx_buffs() [all …]
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/linux/arch/arm64/kvm/hyp/ |
H A D | hyp-entry.S | 216 .macro hyp_ventry indirect, spectrev2 226 .if \indirect != 0 249 .macro generate_vectors indirect, spectrev2 252 hyp_ventry \indirect, \spectrev2 259 generate_vectors indirect = 0, spectrev2 = 1 // HYP_VECTOR_SPECTRE_DIRECT 260 generate_vectors indirect = 1, spectrev2 = 0 // HYP_VECTOR_INDIRECT 261 generate_vectors indirect = 1, spectrev2 = 1 // HYP_VECTOR_SPECTRE_INDIRECT
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/linux/drivers/block/xen-blkback/ |
H A D | blkback.c | 1105 dst->u.indirect.indirect_op = src->u.indirect.indirect_op; in blkif_get_x86_32_req() 1106 dst->u.indirect.nr_segments = in blkif_get_x86_32_req() 1108 dst->u.indirect.handle = src->u.indirect.handle; in blkif_get_x86_32_req() 1109 dst->u.indirect.id = src->u.indirect.id; in blkif_get_x86_32_req() 1110 dst->u.indirect.sector_number = src->u.indirect.sector_number; in blkif_get_x86_32_req() 1114 dst->u.indirect.indirect_grefs[i] = in blkif_get_x86_32_req() 1158 dst->u.indirect.indirect_op = src->u.indirect.indirect_op; in blkif_get_x86_64_req() 1159 dst->u.indirect.nr_segments = in blkif_get_x86_64_req() 1161 dst->u.indirect.handle = src->u.indirect.handle; in blkif_get_x86_64_req() 1162 dst->u.indirect.id = src->u.indirect.id; in blkif_get_x86_64_req() [all …]
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/linux/Documentation/admin-guide/hw-vuln/ |
H A D | spectre.rst | 62 execution of indirect branches to leak privileged memory. 93 execution of indirect branches :ref:`[3] <spec_ref3>`. The indirect 104 buffer of a CPU used for predicting indirect branch addresses. Such 105 poisoning could be done by indirect branching into existing code, 106 with the address offset of the indirect branch under the attacker's 291 guests from affecting indirect branching in the host kernel. 542 can disable indirect branch speculation via prctl() (See 607 (indirect branch prediction) vulnerability. System may 615 (indirect branch speculation) vulnerability. 645 retpoline,lfence LFENCE; indirect branch [all …]
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/linux/tools/testing/selftests/bpf/progs/ |
H A D | map_ptr_kern.c | 50 static inline int check_bpf_map_ptr(struct bpf_map *indirect, in check_bpf_map_ptr() argument 53 VERIFY(indirect->map_type == direct->map_type); in check_bpf_map_ptr() 54 VERIFY(indirect->key_size == direct->key_size); in check_bpf_map_ptr() 55 VERIFY(indirect->value_size == direct->value_size); in check_bpf_map_ptr() 56 VERIFY(indirect->max_entries == direct->max_entries); in check_bpf_map_ptr() 57 VERIFY(indirect->id == direct->id); in check_bpf_map_ptr() 65 VERIFY(check_bpf_map_ptr(indirect, direct)); in check() 66 VERIFY(check_bpf_map_fields(indirect, key_size, value_size, in check() 71 static inline int check_default(struct bpf_map *indirect, in check_default() argument 74 VERIFY(check(indirect, direct, sizeof(__u32), sizeof(__u32), in check_default() [all …]
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/linux/arch/x86/mm/ |
H A D | ioremap.c | 637 struct setup_indirect *indirect; in memremap_is_setup_data() local 672 indirect = (struct setup_indirect *)data->data; in memremap_is_setup_data() 674 if (indirect->type != SETUP_INDIRECT) { in memremap_is_setup_data() 675 paddr = indirect->addr; in memremap_is_setup_data() 676 len = indirect->len; in memremap_is_setup_data() 698 struct setup_indirect *indirect; in early_memremap_is_setup_data() local 734 indirect = (struct setup_indirect *)data->data; in early_memremap_is_setup_data() 736 if (indirect->type != SETUP_INDIRECT) { in early_memremap_is_setup_data() 737 paddr = indirect->addr; in early_memremap_is_setup_data() 738 len = indirect->len; in early_memremap_is_setup_data()
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/linux/drivers/net/can/sja1000/ |
H A D | sja1000_isa.c | 37 static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1}; variable 46 module_param_hw_array(indirect, int, ioport, NULL, 0444); 47 MODULE_PARM_DESC(indirect, "Indirect access via address and data port"); 139 if (indirect[idx] > 0 || in sja1000_isa_probe() 140 (indirect[idx] == -1 && indirect[0] > 0)) in sja1000_isa_probe()
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/linux/drivers/net/can/cc770/ |
H A D | cc770_isa.c | 75 static int indirect[MAXDEV] = {[0 ... (MAXDEV - 1)] = -1}; variable 83 module_param_hw_array(indirect, int, ioport, NULL, 0444); 84 MODULE_PARM_DESC(indirect, "Indirect access via address and data port"); 184 if (indirect[idx] > 0 || in cc770_isa_probe() 185 (indirect[idx] == -1 && indirect[0] > 0)) in cc770_isa_probe()
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/linux/arch/m68k/math-emu/ |
H A D | fp_decode.h | 196 | test if %pc is the base register for the indirect addr mode 220 | addressing mode: address register indirect 244 | addressing mode: address register indirect with postincrement 263 | addressing mode: address register indirect with predecrement 289 | addressing mode: address register/programm counter indirect 331 | all other indirect addressing modes will finally end up here 345 | addressing mode: address register/programm counter indirect 355 3: | addressing mode: address register/programm counter memory indirect
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H A D | fp_move.S | 135 | addressing mode: address register indirect 140 | addressing mode: address register indirect with postincrement 145 | addressing mode: address register indirect with predecrement 150 | addressing mode: address register indirect with 16bit displacement
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/linux/Documentation/virt/ |
H A D | paravirt_ops.rst | 23 - simple indirect call 25 known that the overhead of indirect call isn't very important. 27 - indirect call which allows optimization with binary patch
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/linux/fs/befs/ |
H A D | datastream.c | 189 metablocks += ds->indirect.len; in befs_count_blocks() 317 befs_block_run indirect = data->indirect; in befs_find_brun_indirect() local 318 befs_blocknr_t indirblockno = iaddr2blockno(sb, &indirect); in befs_find_brun_indirect() 327 for (i = 0; i < indirect.len; i++) { in befs_find_brun_indirect()
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/linux/sound/core/ |
H A D | control_compat.c | 137 unsigned int indirect; /* bit-field causes misalignment */ member 152 unsigned int indirect; /* bit-field causes misalignment */ member 214 unsigned int indirect; in copy_ctl_value_from_user() local 218 if (get_user(indirect, &data32->indirect)) in copy_ctl_value_from_user() 220 if (indirect) in copy_ctl_value_from_user()
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