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Searched refs:iobase (Results 1 – 25 of 283) sorted by relevance

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/linux/drivers/comedi/drivers/
H A Dni_atmio16d.c184 outw(0, dev->iobase + AD_CLEAR_REG); in reset_counters()
193 outw(0, dev->iobase + COM_REG_1); in reset_atmio16d()
194 outw(0, dev->iobase + COM_REG_2); in reset_atmio16d()
195 outw(0, dev->iobase + MUX_GAIN_REG); in reset_atmio16d()
209 outw(0, dev->iobase + AD_CLEAR_REG); in reset_atmio16d()
210 outw(0, dev->iobase + INT2CLR_REG); in reset_atmio16d()
216 outw(2048, dev->iobase + DAC0_REG); in reset_atmio16d()
217 outw(2048, dev->iobase + DAC1_REG); in reset_atmio16d()
226 val = inw(dev->iobase + AD_FIFO_REG); in atmio16d_interrupt()
416 outw(0, dev->iobase + INT2CLR_REG); in atmio16d_ai_cmd()
[all …]
H A Dadv_pci_dio.c399 unsigned long iobase = dev->iobase + reg; in pci_dio_insn_bits_dirq_b() local
401 data[1] = inb(iobase); in pci_dio_insn_bits_dirq_b()
412 unsigned long iobase = dev->iobase + reg; in pci_dio_insn_bits_di_b() local
414 data[1] = inb(iobase); in pci_dio_insn_bits_di_b()
431 unsigned long iobase = dev->iobase + reg; in pci_dio_insn_bits_di_w() local
433 data[1] = inw(iobase); in pci_dio_insn_bits_di_w()
446 unsigned long iobase = dev->iobase + reg; in pci_dio_insn_bits_do_b() local
449 outb(s->state & 0xff, iobase); in pci_dio_insn_bits_do_b()
469 unsigned long iobase = dev->iobase + reg; in pci_dio_insn_bits_do_w() local
472 outw(s->state & 0xffff, iobase); in pci_dio_insn_bits_do_w()
[all …]
H A Daddi_apci_1564.c181 outl(0x0, dev->iobase + APCI1564_DO_REG); in apci1564_reset()
195 outl(0x0, iobase + APCI1564_COUNTER(0)); in apci1564_reset()
196 outl(0x0, iobase + APCI1564_COUNTER(1)); in apci1564_reset()
197 outl(0x0, iobase + APCI1564_COUNTER(2)); in apci1564_reset()
239 unsigned long iobase; in apci1564_interrupt() local
584 val = inl(iobase + ADDI_TCW_CTRL_REG); in apci1564_counter_insn_config()
587 outl(val, iobase + ADDI_TCW_CTRL_REG); in apci1564_counter_insn_config()
590 val = inl(iobase + ADDI_TCW_CTRL_REG); in apci1564_counter_insn_config()
592 outl(val, iobase + ADDI_TCW_CTRL_REG); in apci1564_counter_insn_config()
604 val = inl(iobase + ADDI_TCW_CTRL_REG); in apci1564_counter_insn_config()
[all …]
H A Dni_daq_700.c84 outb(s->state & 0xff, dev->iobase + DIO_W); in daq700_dio_insn_bits()
88 val |= inb(dev->iobase + DIO_R) << 8; in daq700_dio_insn_bits()
119 status = inb(dev->iobase + STA_R2); in daq700_ai_eoc()
122 status = inb(dev->iobase + STA_R1); in daq700_ai_eoc()
152 outb(chan | 0x80, dev->iobase + CMD_R1); in daq700_ai_rinsn()
163 inw(dev->iobase + ADFIFO_R); in daq700_ai_rinsn()
165 outb(0x32, dev->iobase + CMO_R); in daq700_ai_rinsn()
173 d = inw(dev->iobase + ADFIFO_R); in daq700_ai_rinsn()
197 unsigned long iobase = dev->iobase; in daq700_ai_config() local
200 outb(0x00, iobase + CMD_R2); /* clear all bits */ in daq700_ai_config()
[all …]
H A Ddmm32at.c170 dev->iobase + DMM32AT_FIFO_CTRL_REG); in dmm32at_ai_set_chanspec()
182 val = inb(dev->iobase + DMM32AT_AI_LSB_REG); in dmm32at_ai_get_sample()
196 status = inb(dev->iobase + context); in dmm32at_ai_status()
350 outb(lo1, dev->iobase + DMM32AT_CLK1); in dmm32at_setaitimer()
354 outb(lo2, dev->iobase + DMM32AT_CLK2); in dmm32at_setaitimer()
355 outb(hi2, dev->iobase + DMM32AT_CLK2); in dmm32at_setaitimer()
360 dev->iobase + DMM32AT_INTCLK_REG); in dmm32at_setaitimer()
465 dev->iobase + DMM32AT_AO_MSB_REG); in dmm32at_ao_insn_write()
473 inb(dev->iobase + DMM32AT_AO_MSB_REG); in dmm32at_ao_insn_write()
488 outb(data, dev->iobase + regbase + port); in dmm32at_8255_io()
[all …]
H A Daddi_apci_3501.c147 dev->iobase + APCI3501_AO_DATA_REG); in apci3501_ao_insn_write()
185 val = inb(iobase + AMCC_OP_REG_MCSR_NVCMD); in apci3501_eeprom_wait()
202 apci3501_eeprom_wait(iobase); in apci3501_eeprom_readw()
204 apci3501_eeprom_wait(iobase); in apci3501_eeprom_readw()
208 apci3501_eeprom_wait(iobase); in apci3501_eeprom_readw()
210 iobase + AMCC_OP_REG_MCSR_NVDATA); in apci3501_eeprom_readw()
211 apci3501_eeprom_wait(iobase); in apci3501_eeprom_readw()
215 apci3501_eeprom_wait(iobase); in apci3501_eeprom_readw()
217 apci3501_eeprom_wait(iobase); in apci3501_eeprom_readw()
281 outl(0x0, dev->iobase + APCI3501_DO_REG); in apci3501_reset()
[all …]
H A Dpcmmio.c188 unsigned long iobase = dev->iobase; in pcmmio_dio_write() local
210 unsigned long iobase = dev->iobase; in pcmmio_dio_read() local
222 val = inb(iobase + PCMMIO_PAGE_REG(0)); in pcmmio_dio_read()
534 unsigned long iobase = dev->iobase; in pcmmio_ai_insn_read() local
560 iobase += PCMMIO_AI_2ND_ADC_OFFSET; in pcmmio_ai_insn_read()
570 outb(cmd, iobase + PCMMIO_AI_CMD_REG); in pcmmio_ai_insn_read()
576 val = inb(iobase + PCMMIO_AI_LSB_REG); in pcmmio_ai_insn_read()
617 unsigned long iobase = dev->iobase; in pcmmio_ao_insn_write() local
631 iobase += PCMMIO_AO_2ND_DAC_OFFSET; in pcmmio_ao_insn_write()
638 outb(0, iobase + PCMMIO_AO_MSB_REG); in pcmmio_ao_insn_write()
[all …]
H A Ddt2817.c65 outb(oe, dev->iobase + DT2817_CR); in dt2817_dio_insn_config()
75 unsigned long iobase = dev->iobase + DT2817_DATA; in dt2817_dio_insn_bits() local
82 outb(s->state & 0xff, iobase + 0); in dt2817_dio_insn_bits()
84 outb((s->state >> 8) & 0xff, iobase + 1); in dt2817_dio_insn_bits()
86 outb((s->state >> 16) & 0xff, iobase + 2); in dt2817_dio_insn_bits()
88 outb((s->state >> 24) & 0xff, iobase + 3); in dt2817_dio_insn_bits()
91 val = inb(iobase + 0); in dt2817_dio_insn_bits()
92 val |= (inb(iobase + 1) << 8); in dt2817_dio_insn_bits()
93 val |= (inb(iobase + 2) << 16); in dt2817_dio_insn_bits()
94 val |= (inb(iobase + 3) << 24); in dt2817_dio_insn_bits()
[all …]
H A Daddi_watchdog.c18 unsigned long iobase; member
44 outl(reload, spriv->iobase + ADDI_TCW_RELOAD_REG); in addi_watchdog_insn_config()
57 outl(spriv->wdog_ctrl, spriv->iobase + ADDI_TCW_CTRL_REG); in addi_watchdog_insn_config()
71 data[i] = inl(spriv->iobase + ADDI_TCW_STATUS_REG); in addi_watchdog_insn_read()
92 spriv->iobase + ADDI_TCW_CTRL_REG); in addi_watchdog_insn_write()
98 void addi_watchdog_reset(unsigned long iobase) in addi_watchdog_reset() argument
100 outl(0x0, iobase + ADDI_TCW_CTRL_REG); in addi_watchdog_reset()
101 outl(0x0, iobase + ADDI_TCW_RELOAD_REG); in addi_watchdog_reset()
105 int addi_watchdog_init(struct comedi_subdevice *s, unsigned long iobase) in addi_watchdog_init() argument
113 spriv->iobase = iobase; in addi_watchdog_init()
H A Dquatech_daqp_cs.c190 outb(0, dev->iobase + DAQP_CTRL_REG); in daqp_ai_cancel()
191 inb(dev->iobase + DAQP_STATUS_REG); in daqp_ai_cancel()
306 outb(0, dev->iobase + DAQP_AUX_REG); in daqp_ai_insn_read()
327 dev->iobase + DAQP_CMD_REG); in daqp_ai_insn_read()
334 inb(dev->iobase + DAQP_STATUS_REG); in daqp_ai_insn_read()
341 inb(dev->iobase + DAQP_STATUS_REG); in daqp_ai_insn_read()
473 outb(0, dev->iobase + DAQP_AUX_REG); in daqp_ai_cmd()
600 dev->iobase + DAQP_AI_FIFO_REG); in daqp_ai_cmd()
643 outb(0, dev->iobase + DAQP_AUX_REG); in daqp_ao_insn_write()
656 dev->iobase + DAQP_AO_REG); in daqp_ao_insn_write()
[all …]
H A Dmultiq3.c77 dev->iobase + MULTIQ3_CTRL_REG); in multiq3_set_ctrl()
87 status = inw(dev->iobase + MULTIQ3_STATUS_REG); in multiq3_ai_status()
111 outw(0, dev->iobase + MULTIQ3_AI_CONV_REG); in multiq3_ai_insn_read()
119 val = inb(dev->iobase + MULTIQ3_AI_REG) << 8; in multiq3_ai_insn_read()
120 val |= inb(dev->iobase + MULTIQ3_AI_REG); in multiq3_ai_insn_read()
143 outw(val, dev->iobase + MULTIQ3_AO_REG); in multiq3_ao_insn_write()
155 data[1] = inw(dev->iobase + MULTIQ3_DI_REG); in multiq3_di_insn_bits()
166 outw(s->state, dev->iobase + MULTIQ3_DO_REG); in multiq3_do_insn_bits()
194 val = inb(dev->iobase + MULTIQ3_ENC_DATA_REG); in multiq3_encoder_insn_read()
195 val |= (inb(dev->iobase + MULTIQ3_ENC_DATA_REG) << 8); in multiq3_encoder_insn_read()
[all …]
H A Dke_counter.c73 inb(dev->iobase + KE_LATCH_REG(chan)); in ke_counter_insn_read()
75 val = inb(dev->iobase + KE_LSB_REG(chan)); in ke_counter_insn_read()
76 val |= (inb(dev->iobase + KE_MID_REG(chan)) << 8); in ke_counter_insn_read()
77 val |= (inb(dev->iobase + KE_MSB_REG(chan)) << 16); in ke_counter_insn_read()
78 val |= (inb(dev->iobase + KE_SIGN_REG(chan)) << 24); in ke_counter_insn_read()
91 outb(0, dev->iobase + KE_RESET_REG(chan)); in ke_counter_reset()
116 outb(src, dev->iobase + KE_OSC_SEL_REG); in ke_counter_insn_config()
119 src = inb(dev->iobase + KE_OSC_SEL_REG); in ke_counter_insn_config()
153 outb(s->state, dev->iobase + KE_DO_REG); in ke_counter_do_insn_bits()
170 dev->iobase = pci_resource_start(pcidev, 0); in ke_counter_auto_attach()
[all …]
H A Ddas08.c161 status = inb(dev->iobase + DAS08_STATUS_REG); in das08_ai_eoc()
182 inb(dev->iobase + DAS08_AI_LSB_REG); in das08_ai_insn_read()
183 inb(dev->iobase + DAS08_AI_MSB_REG); in das08_ai_insn_read()
197 dev->iobase + DAS08_GAIN_REG); in das08_ai_insn_read()
207 outb_p(0, dev->iobase + DAS08_AI_TRIG_REG); in das08_ai_insn_read()
213 msb = inb(dev->iobase + DAS08_AI_MSB_REG); in das08_ai_insn_read()
214 lsb = inb(dev->iobase + DAS08_AI_LSB_REG); in das08_ai_insn_read()
284 data[1] = inb(dev->iobase + DAS08JR_DI_REG); in das08jr_di_insn_bits()
314 inb(dev->iobase + DAS08JR_AO_UPDATE_REG); in das08_ao_set_data()
319 inb(dev->iobase + DAS08AOX_AO_UPDATE_REG); in das08_ao_set_data()
[all …]
H A Dadv_pci1710.c341 outb(0, dev->iobase + PCI171X_CLRFIFO_REG); in pci1710_ai_insn_read()
342 outb(0, dev->iobase + PCI171X_CLRINT_REG); in pci1710_ai_insn_read()
367 outb(0, dev->iobase + PCI171X_CLRFIFO_REG); in pci1710_ai_insn_read()
368 outb(0, dev->iobase + PCI171X_CLRINT_REG); in pci1710_ai_insn_read()
387 outb(0, dev->iobase + PCI171X_CLRINT_REG); in pci1710_ai_cancel()
413 outb(0, dev->iobase + PCI171X_CLRINT_REG); in pci1710_handle_every_sample()
431 outb(0, dev->iobase + PCI171X_CLRINT_REG); in pci1710_handle_every_sample()
476 outb(0, dev->iobase + PCI171X_CLRINT_REG); in pci1710_handle_fifo()
530 outb(0, dev->iobase + PCI171X_CLRINT_REG); in pci1710_ai_cmd()
727 outw(0, dev->iobase + PCI171X_CTRL_REG); in pci1710_reset()
[all …]
/linux/drivers/rtc/
H A Drtc-asm9260.c108 void __iomem *iobase; member
120 isr = ioread32(priv->iobase + HW_CIIR); in asm9260_rtc_irq()
126 iowrite32(0, priv->iobase + HW_CIIR); in asm9260_rtc_irq()
141 ctime0 = ioread32(priv->iobase + HW_CTIME0); in asm9260_rtc_read_time()
142 ctime1 = ioread32(priv->iobase + HW_CTIME1); in asm9260_rtc_read_time()
143 ctime2 = ioread32(priv->iobase + HW_CTIME2); in asm9260_rtc_read_time()
177 iowrite32(0, priv->iobase + HW_SEC); in asm9260_rtc_set_time()
263 if (IS_ERR(priv->iobase)) in asm9260_rtc_probe()
264 return PTR_ERR(priv->iobase); in asm9260_rtc_probe()
276 ccr = ioread32(priv->iobase + HW_CCR); in asm9260_rtc_probe()
[all …]
/linux/drivers/irqchip/
H A Dirq-sa11x0.c28 static void __iomem *iobase; variable
38 reg = readl_relaxed(iobase + ICMR); in sa1100_mask_irq()
40 writel_relaxed(reg, iobase + ICMR); in sa1100_mask_irq()
47 reg = readl_relaxed(iobase + ICMR); in sa1100_unmask_irq()
49 writel_relaxed(reg, iobase + ICMR); in sa1100_unmask_irq()
136 icip = readl_relaxed(iobase + ICIP); in sa1100_handle_irq()
150 iobase = ioremap(io_start, SZ_64K); in sa11x0_init_irq_nodt()
151 if (WARN_ON(!iobase)) in sa11x0_init_irq_nodt()
155 writel_relaxed(0, iobase + ICMR); in sa11x0_init_irq_nodt()
158 writel_relaxed(0, iobase + ICLR); in sa11x0_init_irq_nodt()
[all …]
/linux/drivers/bluetooth/
H A Dbt3c_cs.c132 bt3c_address(iobase, addr); in bt3c_io_write()
133 bt3c_put(iobase, value); in bt3c_io_write()
149 bt3c_address(iobase, addr); in bt3c_read()
151 return bt3c_get(iobase); in bt3c_read()
163 bt3c_address(iobase, 0x7080); in bt3c_write()
218 unsigned int iobase; in bt3c_receive() local
250 inb(iobase + DATA_H); in bt3c_receive()
286 inb(iobase + DATA_H); in bt3c_receive()
337 unsigned int iobase; in bt3c_interrupt() local
512 bt3c_put(iobase, tmp); in bt3c_load_firmware()
[all …]
H A Dbluecard_cs.c171 outb(0x08 | 0x20, iobase + 0x30); in bluecard_activity_led_timeout()
190 outb(0x00, iobase + 0x30); in bluecard_enable_activity_led()
208 outb_p(actual, iobase + offset); in bluecard_write()
343 len = inb(iobase + offset); in bluecard_read()
368 unsigned int iobase; in bluecard_receive() local
497 unsigned int iobase; in bluecard_interrupt() local
644 outb(0x00, iobase + 0x30); in bluecard_hci_close()
714 id = inb(iobase + 0x30); in bluecard_open()
730 outb(0x80, iobase + 0x30); in bluecard_open()
736 outb(0x00, iobase + 0x30); in bluecard_open()
[all …]
/linux/drivers/staging/vt6655/
H A Dsrom.c59 unsigned char SROMbyReadEmbedded(void __iomem *iobase, in SROMbyReadEmbedded() argument
67 byOrg = ioread8(iobase + MAC_REG_I2MCFG); in SROMbyReadEmbedded()
71 iowrite8(EEP_I2C_DEV_ID, iobase + MAC_REG_I2MTGID); in SROMbyReadEmbedded()
72 iowrite8(contnt_offset, iobase + MAC_REG_I2MTGAD); in SROMbyReadEmbedded()
75 iowrite8(I2MCSR_EEMR, iobase + MAC_REG_I2MCSR); in SROMbyReadEmbedded()
78 byWait = ioread8(iobase + MAC_REG_I2MCSR); in SROMbyReadEmbedded()
88 byData = ioread8(iobase + MAC_REG_I2MDIPT); in SROMbyReadEmbedded()
89 iowrite8(byOrg, iobase + MAC_REG_I2MCFG); in SROMbyReadEmbedded()
111 *pbyEepromRegs = SROMbyReadEmbedded(iobase, in SROMvReadAllContents()
129 void SROMvReadEtherAddress(void __iomem *iobase, in SROMvReadEtherAddress() argument
[all …]
/linux/drivers/net/hamradio/
H A Dbaycom_ser_fdx.c92 #define RBR(iobase) (iobase+0) argument
93 #define THR(iobase) (iobase+0) argument
94 #define IER(iobase) (iobase+1) argument
95 #define IIR(iobase) (iobase+2) argument
96 #define FCR(iobase) (iobase+2) argument
97 #define LCR(iobase) (iobase+3) argument
98 #define MCR(iobase) (iobase+4) argument
99 #define LSR(iobase) (iobase+5) argument
100 #define MSR(iobase) (iobase+6) argument
101 #define SCR(iobase) (iobase+7) argument
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H A Dbaycom_ser_hdx.c78 #define RBR(iobase) (iobase+0) argument
79 #define THR(iobase) (iobase+0) argument
80 #define IER(iobase) (iobase+1) argument
81 #define IIR(iobase) (iobase+2) argument
82 #define FCR(iobase) (iobase+2) argument
83 #define LCR(iobase) (iobase+3) argument
84 #define MCR(iobase) (iobase+4) argument
85 #define LSR(iobase) (iobase+5) argument
86 #define MSR(iobase) (iobase+6) argument
87 #define SCR(iobase) (iobase+7) argument
[all …]
H A Dyam.c149 #define RBR(iobase) (iobase+0) argument
150 #define THR(iobase) (iobase+0) argument
151 #define IER(iobase) (iobase+1) argument
152 #define IIR(iobase) (iobase+2) argument
153 #define FCR(iobase) (iobase+2) argument
154 #define LCR(iobase) (iobase+3) argument
155 #define MCR(iobase) (iobase+4) argument
156 #define LSR(iobase) (iobase+5) argument
157 #define MSR(iobase) (iobase+6) argument
158 #define SCR(iobase) (iobase+7) argument
[all …]
/linux/drivers/char/tpm/
H A Dtpm_tis_synquacer.c28 void __iomem *iobase; member
44 *result++ = ioread8(phy->iobase + addr); in tpm_tis_synquacer_read_bytes()
47 result[1] = ioread8(phy->iobase + addr + 1); in tpm_tis_synquacer_read_bytes()
48 result[0] = ioread8(phy->iobase + addr); in tpm_tis_synquacer_read_bytes()
51 result[3] = ioread8(phy->iobase + addr + 3); in tpm_tis_synquacer_read_bytes()
52 result[2] = ioread8(phy->iobase + addr + 2); in tpm_tis_synquacer_read_bytes()
54 result[0] = ioread8(phy->iobase + addr); in tpm_tis_synquacer_read_bytes()
69 iowrite8(*value++, phy->iobase + addr); in tpm_tis_synquacer_write_bytes()
81 iowrite8(value[0], phy->iobase + addr); in tpm_tis_synquacer_write_bytes()
103 if (IS_ERR(phy->iobase)) in tpm_tis_synquacer_init()
[all …]
H A Dtpm_atmel.c46 status = ioread8(priv->iobase + 1); in tpm_atml_recv()
51 *buf++ = ioread8(priv->iobase); in tpm_atml_recv()
73 status = ioread8(priv->iobase + 1); in tpm_atml_recv()
78 *buf++ = ioread8(priv->iobase); in tpm_atml_recv()
82 status = ioread8(priv->iobase + 1); in tpm_atml_recv()
100 iowrite8(buf[i], priv->iobase); in tpm_atml_send()
117 return ioread8(priv->iobase + 1); in tpm_atml_status()
145 atmel_put_base_addr(priv->iobase); in atml_plat_remove()
161 void __iomem *iobase = NULL; in init_atmel() local
192 priv->iobase = iobase; in init_atmel()
[all …]
/linux/drivers/i2c/busses/
H A Di2c-hisi.c92 void __iomem *iobase; member
166 reg = readl(ctlr->iobase + HISI_I2C_SLV_ADDR); in hisi_i2c_start_xfer()
169 writel(reg, ctlr->iobase + HISI_I2C_SLV_ADDR); in hisi_i2c_start_xfer()
171 reg = readl(ctlr->iobase + HISI_I2C_FIFO_CTRL); in hisi_i2c_start_xfer()
173 writel(reg, ctlr->iobase + HISI_I2C_FIFO_CTRL); in hisi_i2c_start_xfer()
175 writel(reg, ctlr->iobase + HISI_I2C_FIFO_CTRL); in hisi_i2c_start_xfer()
411 writel(scl_hcnt, ctlr->iobase + reg_hcnt); in hisi_i2c_set_scl()
412 writel(scl_lcnt, ctlr->iobase + reg_lcnt); in hisi_i2c_set_scl()
449 writel(reg, ctlr->iobase + HISI_I2C_SDA_HOLD); in hisi_i2c_configure_bus()
472 if (IS_ERR(ctlr->iobase)) in hisi_i2c_probe()
[all …]

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