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Searched refs:mmDIG2_TMDS_DCBALANCER_CONTROL (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2728 #define mmDIG2_TMDS_DCBALANCER_CONTROL 0x4284 macro
H A Ddce_8_0_d.h3466 #define mmDIG2_TMDS_DCBALANCER_CONTROL 0x4284 macro
H A Ddce_10_0_d.h4245 #define mmDIG2_TMDS_DCBALANCER_CONTROL 0x4c73 macro
H A Ddce_11_0_d.h4190 #define mmDIG2_TMDS_DCBALANCER_CONTROL 0x4c73 macro
H A Ddce_11_2_d.h5421 #define mmDIG2_TMDS_DCBALANCER_CONTROL 0x4c73 macro
H A Ddce_12_0_offset.h10748 #define mmDIG2_TMDS_DCBALANCER_CONTROL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h8584 #define mmDIG2_TMDS_DCBALANCER_CONTROL … macro
H A Ddcn_1_0_offset.h8951 #define mmDIG2_TMDS_DCBALANCER_CONTROL … macro
H A Ddcn_2_1_0_offset.h10487 #define mmDIG2_TMDS_DCBALANCER_CONTROL … macro
H A Ddcn_3_0_2_offset.h10219 #define mmDIG2_TMDS_DCBALANCER_CONTROL … macro
H A Ddcn_2_0_0_offset.h11578 #define mmDIG2_TMDS_DCBALANCER_CONTROL … macro
H A Ddcn_3_0_0_offset.h11363 #define mmDIG2_TMDS_DCBALANCER_CONTROL … macro