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/linux/arch/nios2/include/asm/
H A Dasm-macros.h22 movhi \reg1, %hi(\mask)
23 movui \reg1, %lo(\mask)
24 and \reg1, \reg1, \reg2
62 xori \reg1, \reg1, %lo(\mask)
98 BT \reg1, \reg2, \bit
99 beq \reg1, r0, \label
110 BT \reg1, \reg2, \bit
111 bne \reg1, r0, \label
187 beq \reg1, r0, \label
200 bne \reg1, r0, \label
[all …]
/linux/arch/arm64/include/asm/
H A Dkvm_ptrauth.h27 mrs_s \reg1, SYS_APIAKEYLO_EL1
30 mrs_s \reg1, SYS_APIBKEYLO_EL1
33 mrs_s \reg1, SYS_APDAKEYLO_EL1
36 mrs_s \reg1, SYS_APDBKEYLO_EL1
39 mrs_s \reg1, SYS_APGAKEYLO_EL1
73 mrs \reg1, hcr_el2
74 and \reg1, \reg1, #(HCR_API | HCR_APK)
75 cbz \reg1, .L__skip_switch\@
85 mrs \reg1, hcr_el2
86 and \reg1, \reg1, #(HCR_API | HCR_APK)
[all …]
H A Dkvm_mte.h18 mrs \reg1, hcr_el2
21 mrs_s \reg1, SYS_RGSR_EL1
23 mrs_s \reg1, SYS_GCR_EL1
24 str \reg1, [\h_ctxt, #CPU_GCR_EL1]
27 msr_s SYS_RGSR_EL1, \reg1
29 msr_s SYS_GCR_EL1, \reg1
38 mrs \reg1, hcr_el2
41 mrs_s \reg1, SYS_RGSR_EL1
43 mrs_s \reg1, SYS_GCR_EL1
47 msr_s SYS_RGSR_EL1, \reg1
[all …]
/linux/arch/s390/include/asm/
H A Dap.h84 : [reg1] "+&d" (reg1) in ap_instructions_available()
147 : [reg1] "=&d" (reg1.value), [reg2] "=&d" (reg2) in ap_tapq()
190 : [reg1] "=&d" (reg1.value) in ap_rapq()
215 : [reg1] "=&d" (reg1.value) in ap_zapq()
265 : [reg1] "+&d" (reg1) in ap_qci()
319 : [reg1] "+&d" (reg1.value) in ap_aqic()
367 : [reg1] "+&d" (reg1.value), [reg2] "=&d" (reg2) in ap_qact()
392 : [reg1] "=&d" (reg1.value) in ap_bapq()
420 : [reg1] "=&d" (reg1.value) in ap_aapq()
457 : [reg0] "+&d" (reg0), [reg1] "=&d" (reg1.value), in ap_nqap()
[all …]
/linux/arch/arm/probes/kprobes/
H A Dtest-core.h241 TEST_ARG_REG(reg1, val1) \
249 TEST_ARG_REG(reg1, val1) \
258 TEST_ARG_REG(reg1, val1) \
268 TEST_ARG_PTR(reg1, val1) \
275 TEST_ARG_PTR(reg1, val1) \
283 TEST_ARG_REG(reg1, val1) \
291 TEST_ARG_PTR(reg1, val1) \
300 TEST_ARG_REG(reg1, val1) \
309 TEST_ARG_REG(reg1, val1) \
318 TEST_ARG_PTR(reg1, val1) \
[all …]
/linux/arch/x86/events/intel/
H A Duncore_nhmex.c372 reg1->idx = 0; in nhmex_bbox_hw_config()
385 wrmsrl(reg1->reg, reg1->config); in nhmex_bbox_msr_enable_event()
457 reg1->idx = 0; in nhmex_sbox_hw_config()
471 wrmsrl(reg1->reg + 1, reg1->config); in nhmex_sbox_msr_enable_event()
751 reg1->alloc = 0; in nhmex_mbox_put_constraint()
952 reg1->idx--; in nhmex_rbox_alter_er()
955 reg1->idx++; in nhmex_rbox_alter_er()
1056 reg1->alloc = 1; in nhmex_rbox_get_constraint()
1084 reg1->alloc = 0; in nhmex_rbox_put_constraint()
1099 reg1->idx = idx; in nhmex_rbox_hw_config()
[all …]
/linux/arch/arm/kernel/
H A Dhyp-stub.S31 .macro store_primary_cpu_mode reg1, reg2
32 mrs \reg1, cpsr
33 and \reg1, \reg1, #MODE_MASK
34 str_l \reg1, __boot_cpu_mode, \reg2
43 .macro compare_cpu_mode_with_primary mode, reg1, reg2
45 ldr \reg1, [\reg2]
46 cmp \mode, \reg1 @ matches primary CPU boot mode?
47 orrne \reg1, \reg1, #BOOT_CPU_MODE_MISMATCH
48 strne \reg1, [\reg2] @ record what happened and give up
53 .macro store_primary_cpu_mode reg1:req, reg2:req
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/linux/arch/arm/lib/
H A Dcsumpartialcopy.S25 .macro load1b, reg1
26 ldrb \reg1, [r0], #1
29 .macro load2b, reg1, reg2
30 ldrb \reg1, [r0], #1
34 .macro load1l, reg1
35 ldr \reg1, [r0], #4
38 .macro load2l, reg1, reg2
39 ldr \reg1, [r0], #4
43 .macro load4l, reg1, reg2, reg3, reg4
44 ldmia r0!, {\reg1, \reg2, \reg3, \reg4}
H A Dcsumpartialcopyuser.S56 .macro load1b, reg1
57 ldrusr \reg1, r0, 1
60 .macro load2b, reg1, reg2
61 ldrusr \reg1, r0, 1
65 .macro load1l, reg1
66 ldrusr \reg1, r0, 4
69 .macro load2l, reg1, reg2
70 ldrusr \reg1, r0, 4
74 .macro load4l, reg1, reg2, reg3, reg4
75 ldrusr \reg1, r0, 4
H A Dcopy_from_user.S46 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
47 ldr1w \ptr, \reg1, \abort
53 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
54 ldr4w \ptr, \reg1, \reg2, \reg3, \reg4, \abort
66 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
67 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4})
70 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
71 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
86 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
87 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
H A Dcopy_to_user.S40 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
41 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
44 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
45 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
64 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
65 str1w \ptr, \reg1, \abort
83 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
84 USERL(\abort, stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
H A Dmemcpy.S21 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
22 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
25 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
26 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
37 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
38 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
/linux/crypto/
H A Daria_generic.c32 u32 reg0, reg1, reg2, reg3; in aria_set_encrypt_key() local
44 reg1 = w0[1] ^ ck[1]; in aria_set_encrypt_key()
68 w1[1] ^= reg1; in aria_set_encrypt_key()
73 reg1 = w1[1]; in aria_set_encrypt_key()
78 reg1 ^= ck[5]; in aria_set_encrypt_key()
85 reg1 ^= w0[1]; in aria_set_encrypt_key()
90 w2[1] = reg1; in aria_set_encrypt_key()
95 reg1 ^= ck[9]; in aria_set_encrypt_key()
102 w3[1] = reg1 ^ w1[1]; in aria_set_encrypt_key()
200 u32 reg0, reg1, reg2, reg3; in __aria_crypt() local
[all …]
/linux/sound/pci/ice1712/
H A Dwm8776.c133 .reg1 = WM8776_REG_DACLVOL,
159 .reg1 = WM8776_REG_HPLVOL,
177 .reg1 = WM8776_REG_HPLVOL,
186 .reg1 = WM8776_REG_OUTMUX,
192 .reg1 = WM8776_REG_OUTMUX,
230 .reg1 = WM8776_REG_ADCMUX,
239 .reg1 = WM8776_REG_ADCMUX,
245 .reg1 = WM8776_REG_ADCMUX,
251 .reg1 = WM8776_REG_ADCMUX,
257 .reg1 = WM8776_REG_ADCMUX,
[all …]
H A Dwm8766.c34 .reg1 = WM8766_REG_DACL1,
45 .reg1 = WM8766_REG_DACL2,
56 .reg1 = WM8766_REG_DACL3,
66 .reg1 = WM8766_REG_DACCTRL2,
73 .reg1 = WM8766_REG_DACCTRL2,
80 .reg1 = WM8766_REG_DACCTRL2,
87 .reg1 = WM8766_REG_IFCTRL,
93 .reg1 = WM8766_REG_IFCTRL,
99 .reg1 = WM8766_REG_IFCTRL,
105 .reg1 = WM8766_REG_DACCTRL2,
[all …]
/linux/arch/arm64/crypto/
H A Daes-cipher-core.S20 .macro __pair1, sz, op, reg0, reg1, in0, in1e, in1d, shift
23 ubfiz \reg1, \in1e, #2, #8
26 ubfx \reg1, \in1e, #\shift, #8
38 ldr \reg1, [tt, \reg1, uxtw #2]
42 lsl \reg1, \reg1, #2
45 ldrb \reg1, [tt, \reg1, uxtw]
49 .macro __pair0, sz, op, reg0, reg1, in0, in1e, in1d, shift
51 ubfx \reg1, \in1d, #\shift, #8
53 ldr\op \reg1, [tt, \reg1, uxtw #\sz]
/linux/drivers/rtc/
H A Drtc-aspeed.c26 u32 reg1, reg2; in aspeed_rtc_read_time() local
35 reg1 = readl(rtc->base + RTC_TIME); in aspeed_rtc_read_time()
38 tm->tm_mday = (reg1 >> 24) & 0x1f; in aspeed_rtc_read_time()
39 tm->tm_hour = (reg1 >> 16) & 0x1f; in aspeed_rtc_read_time()
40 tm->tm_min = (reg1 >> 8) & 0x3f; in aspeed_rtc_read_time()
41 tm->tm_sec = (reg1 >> 0) & 0x3f; in aspeed_rtc_read_time()
56 u32 reg1, reg2, ctrl; in aspeed_rtc_set_time() local
62 reg1 = (tm->tm_mday << 24) | (tm->tm_hour << 16) | (tm->tm_min << 8) | in aspeed_rtc_set_time()
71 writel(reg1, rtc->base + RTC_TIME); in aspeed_rtc_set_time()
/linux/drivers/media/dvb-frontends/
H A Da8293.c29 u8 reg0, reg1; in a8293_set_voltage_slew() local
125 reg1 = 0x82; in a8293_set_voltage_slew()
126 if (reg1 != dev->reg[1]) { in a8293_set_voltage_slew()
127 ret = i2c_master_send(client, &reg1, 1); in a8293_set_voltage_slew()
130 dev->reg[1] = reg1; in a8293_set_voltage_slew()
148 u8 reg0, reg1; in a8293_set_voltage_noslew() local
178 reg1 = 0x82; in a8293_set_voltage_noslew()
179 if (reg1 != dev->reg[1]) { in a8293_set_voltage_noslew()
180 ret = i2c_master_send(client, &reg1, 1); in a8293_set_voltage_noslew()
183 dev->reg[1] = reg1; in a8293_set_voltage_noslew()
H A Dtua6100.c64 u8 reg1[] = { 0x01, 0x00, 0x00, 0x00 }; in tua6100_set_params() local
67 struct i2c_msg msg1 = { .addr = priv->i2c_address, .flags = 0, .buf = reg1, .len = 4 }; in tua6100_set_params()
82 reg1[1] = 0x2c; in tua6100_set_params()
84 reg1[1] = 0x0c; in tua6100_set_params()
87 reg1[1] |= 0x40; in tua6100_set_params()
89 reg1[1] |= 0x80; in tua6100_set_params()
107 reg1[1] |= (div >> 9) & 0x03; in tua6100_set_params()
108 reg1[2] = div >> 1; in tua6100_set_params()
109 reg1[3] = (div << 7); in tua6100_set_params()
113 reg1[3] |= (prediv - (div*_P_VAL)) & 0x7f; in tua6100_set_params()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_pmdemand.c381 u32 reg1, reg2; in intel_pmdemand_init_pmdemand_params() local
400 REG_FIELD_GET(XELPDP_PMDEMAND_QCLK_GV_BW_MASK, reg1); in intel_pmdemand_init_pmdemand_params()
402 REG_FIELD_GET(XELPDP_PMDEMAND_VOLTAGE_INDEX_MASK, reg1); in intel_pmdemand_init_pmdemand_params()
404 REG_FIELD_GET(XELPDP_PMDEMAND_QCLK_GV_INDEX_MASK, reg1); in intel_pmdemand_init_pmdemand_params()
406 REG_FIELD_GET(XELPDP_PMDEMAND_PIPES_MASK, reg1); in intel_pmdemand_init_pmdemand_params()
408 REG_FIELD_GET(XELPDP_PMDEMAND_DBUFS_MASK, reg1); in intel_pmdemand_init_pmdemand_params()
410 REG_FIELD_GET(XELPDP_PMDEMAND_PHYS_MASK, reg1); in intel_pmdemand_init_pmdemand_params()
465 u32 *reg1, u32 *reg2, bool serialized) in intel_pmdemand_update_params() argument
518 u32 reg1, mod_reg1; in intel_pmdemand_program_params() local
527 mod_reg1 = reg1; in intel_pmdemand_program_params()
[all …]
/linux/arch/s390/kvm/
H A Dpriv.c260 int reg1, reg2; in handle_iske() local
299 vcpu->run->s.regs.gprs[reg1] &= ~0xff; in handle_iske()
300 vcpu->run->s.regs.gprs[reg1] |= key; in handle_iske()
307 int reg1, reg2; in handle_rrbe() local
358 int reg1, reg2; in handle_sske() local
1015 int reg1, reg2; in handle_epsw() local
1045 int reg1, reg2; in handle_pfmf() local
1335 reg = reg1; in kvm_s390_handle_lctl()
1370 reg = reg1; in kvm_s390_handle_stctl()
1408 reg = reg1; in handle_lctlg()
[all …]
H A Dtrace.h287 TP_PROTO(VCPU_PROTO_COMMON, int g, int reg1, int reg3, u64 addr),
288 TP_ARGS(VCPU_ARGS_COMMON, g, reg1, reg3, addr),
293 __field(int, reg1)
301 __entry->reg1 = reg1;
308 __entry->reg1, __entry->reg3, __entry->addr)
312 TP_PROTO(VCPU_PROTO_COMMON, int g, int reg1, int reg3, u64 addr),
313 TP_ARGS(VCPU_ARGS_COMMON, g, reg1, reg3, addr),
318 __field(int, reg1)
326 __entry->reg1 = reg1;
333 __entry->reg1, __entry->reg3, __entry->addr)
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dnv04.c49 nv04_clk_pll_prog(struct nvkm_clk *clk, u32 reg1, struct nvkm_pll_vals *pv) in nv04_clk_pll_prog() argument
57 if (reg1 > 0x405c) in nv04_clk_pll_prog()
58 setPLL_double_highregs(devinit, reg1, pv); in nv04_clk_pll_prog()
60 setPLL_double_lowregs(devinit, reg1, pv); in nv04_clk_pll_prog()
62 setPLL_single(devinit, reg1, pv); in nv04_clk_pll_prog()
/linux/arch/parisc/net/
H A Dbpf_jit.h103 #define hppa_or(reg1, reg2, target) \ argument
105 #define hppa_or_cond(reg1, reg2, cond, f, target) \ argument
106 hppa_t6_insn(0x02, reg2, reg1, cond, f, 0x09, target)
107 #define hppa_and(reg1, reg2, target) \ argument
109 #define hppa_and_cond(reg1, reg2, cond, f, target) \ argument
110 hppa_t6_insn(0x02, reg2, reg1, cond, f, 0x08, target)
111 #define hppa_xor(reg1, reg2, target) \ argument
113 #define hppa_add(reg1, reg2, target) \ argument
115 #define hppa_addc(reg1, reg2, target) \ argument
117 #define hppa_sub(reg1, reg2, target) \ argument
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/linux/tools/perf/util/
H A Dannotate-data.c834 tsr = &state->regs[dst->reg1]; in update_insn_state_x86()
892 tsr = &state->regs[dst->reg1]; in update_insn_state_x86()
953 insn_offset, src->reg1, dst->reg1); in update_insn_state_x86()
958 int sreg = src->reg1; in update_insn_state_x86()
1039 int reg2 = (sreg == src->reg1) ? src->reg2 : src->reg1; in update_insn_state_x86()
1086 src->reg1 != src->reg2) { in update_insn_state_x86()
1116 if (dst->reg1 == fbreg) { in update_insn_state_x86()
1267 int reg = dloc->op->reg1; in check_matching_type()
1370 reg2 = dloc->op->reg1; in check_matching_type()
1633 reg = loc->reg1; in find_data_type_die()
[all …]

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