Searched refs:spare_int (Results 1 – 7 of 7) sorted by relevance
965 void *spare_int; in amdgpu_virt_rlcg_reg_rw() local983 if (reg_access_ctrl->spare_int) in amdgpu_virt_rlcg_reg_rw()984 spare_int = (void __iomem *)adev->rmmio + 4 * reg_access_ctrl->spare_int; in amdgpu_virt_rlcg_reg_rw()1005 if (reg_access_ctrl->spare_int) in amdgpu_virt_rlcg_reg_rw()1006 writel(1, spare_int); in amdgpu_virt_rlcg_reg_rw()
120 …uint32_t spare_int = adev->reg_offset[GC_HWIP][inst][prefix##RLC_SPARE_INT_BASE_IDX] + prefix##RLC…123 WREG32(spare_int, 0x1); \
183 uint32_t spare_int; member
1172 reg_access_ctrl->spare_int = SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), regRLC_SPARE_INT); in gfx_v9_4_3_init_rlcg_reg_access_ctrl()
4247 reg_access_ctrl->spare_int = in gfx_v10_0_init_rlcg_reg_access_ctrl()4251 reg_access_ctrl->spare_int = in gfx_v10_0_init_rlcg_reg_access_ctrl()
712 reg_access_ctrl->spare_int = SOC15_REG_OFFSET(GC, 0, regRLC_SPARE_INT_0); in gfx_v11_0_init_rlcg_reg_access_ctrl()
1644 reg_access_ctrl->spare_int = SOC15_REG_OFFSET(GC, 0, mmRLC_SPARE_INT); in gfx_v9_0_init_rlcg_reg_access_ctrl()