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Searched refs:tclk (Results 1 – 25 of 45) sorted by relevance

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/linux/drivers/clk/sunxi/
H A Dclk-sun4i-tcon-ch1.c41 reg = readl(tclk->reg); in tcon_ch1_disable()
43 writel(reg, tclk->reg); in tcon_ch1_disable()
54 reg = readl(tclk->reg); in tcon_ch1_enable()
56 writel(reg, tclk->reg); in tcon_ch1_enable()
67 reg = readl(tclk->reg); in tcon_ch1_is_enabled()
89 reg = readl(tclk->reg); in tcon_ch1_set_parent()
92 writel(reg, tclk->reg); in tcon_ch1_set_parent()
249 tclk = kzalloc(sizeof(*tclk), GFP_KERNEL); in tcon_ch1_setup()
250 if (!tclk) in tcon_ch1_setup()
259 tclk->reg = reg; in tcon_ch1_setup()
[all …]
/linux/arch/arm/mach-dove/
H A Dcommon.c71 static struct clk *tclk; variable
87 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, 0, dove_tclk); in dove_clk_init()
108 orion_clkdev_add(NULL, "orion_spi.0", tclk); in dove_clk_init()
109 orion_clkdev_add(NULL, "orion_spi.1", tclk); in dove_clk_init()
110 orion_clkdev_add(NULL, "orion_wdt", tclk); in dove_clk_init()
111 orion_clkdev_add(NULL, "mv64xxx_i2c.0", tclk); in dove_clk_init()
181 IRQ_DOVE_UART_0, tclk); in dove_uart0_init()
190 IRQ_DOVE_UART_1, tclk); in dove_uart1_init()
199 IRQ_DOVE_UART_2, tclk); in dove_uart2_init()
208 IRQ_DOVE_UART_3, tclk); in dove_uart3_init()
/linux/Documentation/devicetree/bindings/clock/
H A Dmvebu-core-clock.txt8 0 = tclk (Internal Bus clock)
15 0 = tclk (Internal Bus clock)
21 0 = tclk (Internal Bus clock)
27 0 = tclk (Internal Bus clock)
35 0 = tclk (Internal Bus clock)
41 0 = tclk (Internal Bus clock)
47 0 = tclk (Internal Bus clock)
72 output names ("tclk", "cpuclk", "l2clk", "ddrclk")
85 /* get tclk from core clock provider */
H A Dqcom,sdx75-gcc.yaml28 - description: EMAC0 sgmiiphy mac tclk source
30 - description: EMAC0 sgmiiphy tclk source
32 - description: EMAC1 sgmiiphy mac tclk source
34 - description: EMAC1 sgmiiphy tclk source
H A Dmvebu-gated-clock.txt189 - clocks : default parent clock phandle (e.g. tclk)
196 /* default parent clock is tclk */
/linux/arch/arm/mach-mv78xx0/
H A Dcommon.c165 static struct clk *tclk; variable
169 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, 0, get_tclk()); in clk_init()
171 orion_clkdev_init(tclk); in clk_init()
291 IRQ_MV78XX0_UART_0, tclk); in mv78xx0_uart0_init()
301 IRQ_MV78XX0_UART_1, tclk); in mv78xx0_uart1_init()
311 IRQ_MV78XX0_UART_2, tclk); in mv78xx0_uart2_init()
320 IRQ_MV78XX0_UART_3, tclk); in mv78xx0_uart3_init()
/linux/arch/arm/plat-orion/
H A Dtime.c197 unsigned int irq, unsigned int tclk) in orion_time_init() argument
207 ticks_per_jiffy = (tclk + HZ/2) / HZ; in orion_time_init()
209 orion_delay_timer.freq = tclk; in orion_time_init()
215 sched_clock_register(orion_read_sched_clock, 32, tclk); in orion_time_init()
228 tclk, 300, 32, clocksource_mmio_readl_down); in orion_time_init()
237 clockevents_config_and_register(&orion_clkevt, tclk, 1, 0xfffffffe); in orion_time_init()
H A Dcommon.c37 void __init orion_clkdev_init(struct clk *tclk) in orion_clkdev_init() argument
39 orion_clkdev_add(NULL, "orion_spi.0", tclk); in orion_clkdev_init()
40 orion_clkdev_add(NULL, "orion_spi.1", tclk); in orion_clkdev_init()
41 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk); in orion_clkdev_init()
42 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk); in orion_clkdev_init()
43 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk); in orion_clkdev_init()
44 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk); in orion_clkdev_init()
45 orion_clkdev_add(NULL, "orion_wdt", tclk); in orion_clkdev_init()
46 orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk); in orion_clkdev_init()
/linux/drivers/clk/
H A Dclk-vt8500.c353 unsigned long tclk; in vt8500_find_pll_bits() local
369 tclk = (parent_rate / *prediv) * *multiplier; in vt8500_find_pll_bits()
371 if (tclk != rate) in vt8500_find_pll_bits()
373 rate, tclk); in vt8500_find_pll_bits()
457 unsigned long tclk, rate_err, best_err; in wm8750_find_pll_bits() local
466 if (tclk > rate) in wm8750_find_pll_bits()
469 rate_err = rate - tclk; in wm8750_find_pll_bits()
505 unsigned long tclk, rate_err, best_err; in wm8850_find_pll_bits() local
513 tclk = parent_rate * ((mul + 1) * 2) / in wm8850_find_pll_bits()
515 if (tclk > rate) in wm8850_find_pll_bits()
[all …]
/linux/arch/arm/mach-orion5x/
H A Dcommon.c62 static struct clk *tclk; variable
66 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, 0, orion5x_tclk); in clk_init()
68 orion_clkdev_init(tclk); in clk_init()
136 IRQ_ORION5X_UART0, tclk); in orion5x_uart0_init()
145 IRQ_ORION5X_UART1, tclk); in orion5x_uart1_init()
/linux/drivers/power/reset/
H A Dqnap-poweroff.c50 static unsigned long tclk; variable
55 const unsigned divisor = ((tclk + (8 * cfg->baud)) / (16 * cfg->baud)); in qnap_power_off()
101 tclk = clk_get_rate(clk); in qnap_power_off_probe()
/linux/drivers/i2c/busses/
H A Di2c-mv64xxx.c825 const int tclk, const int n, const int m) in mv64xxx_calc_freq() argument
828 return tclk / (10 * (m + 1) * (1 << n)); in mv64xxx_calc_freq()
830 return tclk / (10 * (m + 1) * (2 << n)); in mv64xxx_calc_freq()
835 const u32 req_freq, const u32 tclk) in mv64xxx_find_baud_factors() argument
842 freq = mv64xxx_calc_freq(drv_data, tclk, n, m); in mv64xxx_find_baud_factors()
863 u32 bus_freq, tclk; in mv64xxx_of_config() local
874 tclk = clk_get_rate(drv_data->clk); in mv64xxx_of_config()
883 if (!mv64xxx_find_baud_factors(drv_data, bus_freq, tclk)) { in mv64xxx_of_config()
H A Di2c-octeon-core.c675 int tclk, thp_base, inc, thp_idx, mdiv_idx, ndiv_idx, foscl, diff; in octeon_i2c_set_clock() local
707 tclk = i2c->twsi_freq * (mdiv_idx + 1) * ds; in octeon_i2c_set_clock()
708 tclk *= (1 << ndiv_idx); in octeon_i2c_set_clock()
710 thp_base = (i2c->sys_freq / tclk) - 2; in octeon_i2c_set_clock()
712 thp_base = (i2c->sys_freq / (tclk * 2)) - 1; in octeon_i2c_set_clock()
/linux/arch/arm/plat-orion/include/plat/
H A Dtime.h17 unsigned int irq, unsigned int tclk);
H A Dcommon.h103 void __init orion_clkdev_init(struct clk *tclk);
/linux/Documentation/devicetree/bindings/watchdog/
H A Dsnps,dw-wdt.yaml53 - const: tclk
100 clock-names = "tclk";
/linux/Documentation/devicetree/bindings/timer/
H A Dmarvell,orion-timer.txt7 - clocks: phandle of timer reference clock (tclk)
/linux/Documentation/devicetree/bindings/power/reset/
H A Dqnap-poweroff.txt15 - clocks: tclk clock
/linux/arch/mips/include/asm/octeon/
H A Dcvmx-uctlx-defs.h357 uint64_t tclk:1; member
365 uint64_t tclk:1;
/linux/Documentation/devicetree/bindings/ptp/
H A Dfsl,ptp.yaml55 fsl,tclk-period:
150 fsl,tclk-period = <10>;
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,armada-370-pinctrl.txt52 mpp31 31 gpio, tclk, ge0(txerr)
94 mpp63 63 gpio, spi0(sck), tclk
/linux/arch/arm/mach-omap1/
H A Dclock.c814 void propagate_rate(struct omap1_clk *tclk) in propagate_rate() argument
819 if (WARN_ON(!(clk_hw_get_flags(&tclk->hw) & CLK_GET_RATE_NOCACHE))) in propagate_rate()
822 clkp = clk_get_sys(NULL, clk_hw_get_name(&tclk->hw)); in propagate_rate()
/linux/drivers/sh/clk/
H A Dcore.c226 void propagate_rate(struct clk *tclk) in propagate_rate() argument
230 list_for_each_entry(clkp, &tclk->children, sibling) { in propagate_rate()
/linux/arch/powerpc/boot/dts/fsl/
H A Dbsc9131rdb.dtsi87 fsl,tclk-period = <5>;
H A Dbsc9132qds.dtsi94 fsl,tclk-period = <5>;

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