| /minix/external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 538 BR_CC, enumerator
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.h | 58 BR_CC, enumerator
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| H A D | MSP430ISelLowering.cpp | 108 setOperationAction(ISD::BR_CC, MVT::i8, Custom); in MSP430TargetLowering()
109 setOperationAction(ISD::BR_CC, MVT::i16, Custom); in MSP430TargetLowering()
196 case ISD::BR_CC: return LowerBR_CC(Op, DAG); in LowerOperation()
907 return DAG.getNode(MSP430ISD::BR_CC, dl, Op.getValueType(), in LowerBR_CC()
1157 case MSP430ISD::BR_CC: return "MSP430ISD::BR_CC"; in getTargetNodeName()
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| H A D | MSP430InstrInfo.td | 61 def MSP430brcc : SDNode<"MSP430ISD::BR_CC", SDT_MSP430BrCC,
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1364 setOperationAction(ISD::BR_CC, MVT::f32, Expand); in HexagonTargetLowering()
1365 setOperationAction(ISD::BR_CC, MVT::f64, Expand); in HexagonTargetLowering()
1366 setOperationAction(ISD::BR_CC, MVT::i1, Expand); in HexagonTargetLowering()
1367 setOperationAction(ISD::BR_CC, MVT::i32, Expand); in HexagonTargetLowering()
1368 setOperationAction(ISD::BR_CC, MVT::i64, Expand); in HexagonTargetLowering()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 148 setOperationAction(ISD::BR_CC, MVT::f32, Expand); in NVPTXTargetLowering()
149 setOperationAction(ISD::BR_CC, MVT::f64, Expand); in NVPTXTargetLowering()
150 setOperationAction(ISD::BR_CC, MVT::i1, Expand); in NVPTXTargetLowering()
151 setOperationAction(ISD::BR_CC, MVT::i8, Expand); in NVPTXTargetLowering()
152 setOperationAction(ISD::BR_CC, MVT::i16, Expand); in NVPTXTargetLowering()
153 setOperationAction(ISD::BR_CC, MVT::i32, Expand); in NVPTXTargetLowering()
154 setOperationAction(ISD::BR_CC, MVT::i64, Expand); in NVPTXTargetLowering()
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| /minix/external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 265 case ISD::BR_CC: return "br_cc"; in getOperationName()
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| H A D | LegalizeDAG.cpp | 1211 case ISD::BR_CC: { in LegalizeOp()
1214 unsigned CompareOperand = Node->getOpcode() == ISD::BR_CC ? 2 : 0; in LegalizeOp()
3912 Tmp1 = DAG.getNode(ISD::BR_CC, dl, MVT::Other, in ExpandNode()
3921 Tmp1 = DAG.getNode(ISD::BR_CC, dl, MVT::Other, Tmp1, in ExpandNode()
4042 case ISD::BR_CC: { in ExpandNode()
4061 Tmp1 = DAG.getNode(ISD::BR_CC, dl, Node->getValueType(0), Tmp1, in ExpandNode()
4066 Tmp1 = DAG.getNode(ISD::BR_CC, dl, Node->getValueType(0), Tmp1, Tmp4, in ExpandNode()
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| H A D | LegalizeFloatTypes.cpp | 683 case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break; in SoftenFloatOperand()
1373 case ISD::BR_CC: Res = ExpandFloatOp_BR_CC(N); break; in ExpandFloatOperand()
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| H A D | LegalizeIntegerTypes.cpp | 827 case ISD::BR_CC: Res = PromoteIntOp_BR_CC(N, OpNo); break; in PromoteIntegerOperand()
2576 case ISD::BR_CC: Res = ExpandIntOp_BR_CC(N); break; in ExpandIntegerOperand()
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| H A D | DAGCombiner.cpp | 1338 case ISD::BR_CC: return visitBR_CC(N); in visit()
8027 TLI.isOperationLegalOrCustom(ISD::BR_CC, in visitBRCOND()
8029 return DAG.getNode(ISD::BR_CC, SDLoc(N), MVT::Other, in visitBRCOND()
8179 return DAG.getNode(ISD::BR_CC, SDLoc(N), MVT::Other, in visitBR_CC()
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| H A D | SelectionDAG.cpp | 5027 case ISD::BR_CC: { in getNode()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1450 setOperationAction(ISD::BR_CC, MVT::i32, Custom); in SparcTargetLowering()
1451 setOperationAction(ISD::BR_CC, MVT::f32, Custom); in SparcTargetLowering()
1452 setOperationAction(ISD::BR_CC, MVT::f64, Custom); in SparcTargetLowering()
1453 setOperationAction(ISD::BR_CC, MVT::f128, Custom); in SparcTargetLowering()
1469 setOperationAction(ISD::BR_CC, MVT::i64, Custom); in SparcTargetLowering()
2806 case ISD::BR_CC: return LowerBR_CC(Op, DAG, *this, in LowerOperation()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 133 setOperationAction(ISD::BR_CC, MVT::i32, Custom); in AArch64TargetLowering()
134 setOperationAction(ISD::BR_CC, MVT::i64, Custom); in AArch64TargetLowering()
135 setOperationAction(ISD::BR_CC, MVT::f32, Custom); in AArch64TargetLowering()
136 setOperationAction(ISD::BR_CC, MVT::f64, Custom); in AArch64TargetLowering()
180 setOperationAction(ISD::BR_CC, MVT::f128, Custom); in AArch64TargetLowering()
330 setOperationAction(ISD::BR_CC, MVT::v4f16, Expand); in AArch64TargetLowering()
363 setOperationAction(ISD::BR_CC, MVT::v8f16, Expand); in AArch64TargetLowering()
518 setOperationAction(ISD::BR_CC, MVT::v1f64, Expand); in AArch64TargetLowering()
1892 case ISD::BR_CC: in LowerOperation()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 289 setOperationAction(ISD::BR_CC, MVT::f32, Expand); in MipsTargetLowering()
290 setOperationAction(ISD::BR_CC, MVT::f64, Expand); in MipsTargetLowering()
291 setOperationAction(ISD::BR_CC, MVT::i32, Expand); in MipsTargetLowering()
292 setOperationAction(ISD::BR_CC, MVT::i64, Expand); in MipsTargetLowering()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/R600/ |
| H A D | R600ISelLowering.cpp | 70 setOperationAction(ISD::BR_CC, MVT::i32, Expand); in R600TargetLowering()
71 setOperationAction(ISD::BR_CC, MVT::f32, Expand); in R600TargetLowering()
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| H A D | AMDGPUISelLowering.cpp | 233 setOperationAction(ISD::BR_CC, MVT::i1, Expand); in AMDGPUTargetLowering()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 132 setOperationAction(ISD::BR_CC, VT, Custom); in SystemZTargetLowering()
2406 case ISD::BR_CC: in LowerOperation()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 93 setOperationAction(ISD::BR_CC, MVT::i32, Expand); in XCoreTargetLowering()
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| /minix/external/bsd/llvm/dist/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 417 def brcc : SDNode<"ISD::BR_CC" , SDTBrCC, [SDNPHasChain]>;
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 842 setOperationAction(ISD::BR_CC, MVT::i32, Custom); in ARMTargetLowering()
843 setOperationAction(ISD::BR_CC, MVT::f32, Custom); in ARMTargetLowering()
844 setOperationAction(ISD::BR_CC, MVT::f64, Custom); in ARMTargetLowering()
6419 case ISD::BR_CC: return LowerBR_CC(Op, DAG); in LowerOperation()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 448 setOperationAction(ISD::BR_CC , MVT::f32, Expand); in resetOperationActions()
449 setOperationAction(ISD::BR_CC , MVT::f64, Expand); in resetOperationActions()
450 setOperationAction(ISD::BR_CC , MVT::f80, Expand); in resetOperationActions()
451 setOperationAction(ISD::BR_CC , MVT::i8, Expand); in resetOperationActions()
452 setOperationAction(ISD::BR_CC , MVT::i16, Expand); in resetOperationActions()
453 setOperationAction(ISD::BR_CC , MVT::i32, Expand); in resetOperationActions()
454 setOperationAction(ISD::BR_CC , MVT::i64, Expand); in resetOperationActions()
1404 setOperationAction(ISD::BR_CC, MVT::i1, Expand); in resetOperationActions()
24214 case ISD::BR_CC: in CMPEQCombine()
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| /minix/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 2797 case ISD::BR_CC: { in Select()
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| H A D | PPCISelLowering.cpp | 635 setTargetDAGCombine(ISD::BR_CC); in PPCTargetLowering()
9123 case ISD::BR_CC: { in PerformDAGCombine()
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