/minix/external/bsd/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCCodeEmitter.cpp | 536 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue() 566 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in EncodeAddrModeOpValues() 1082 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getLdStSORegOpValue() 1118 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode2OpValue() 1175 Imm8 = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode3OffsetOpValue() 1204 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode3OpValue() 1211 Imm8 = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getAddrMode3OpValue() 1241 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrModeISOpValue() 1404 Value |= CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getT2AddrModeSORegOpValue() 1542 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getRegisterListOpValue() [all …]
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/minix/external/bsd/llvm/dist/llvm/lib/Target/XCore/ |
H A D | XCoreSubtarget.h | 61 const TargetRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function 62 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/MSP430/ |
H A D | MSP430Subtarget.h | 59 const TargetRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function 60 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/Sparc/ |
H A D | SparcSubtarget.h | 54 const SparcRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function 55 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/SystemZ/ |
H A D | SystemZSubtarget.h | 63 const SystemZRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function 64 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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/minix/external/bsd/llvm/dist/llvm/lib/CodeGen/ |
H A D | LLVMTargetMachine.cpp | 53 *getSubtargetImpl()->getRegisterInfo(), getTargetTriple()); in initAsmInfo() 115 *TM->getMCAsmInfo(), *TM->getSubtargetImpl()->getRegisterInfo(), in addPassesToGenerateCode() 176 const MCRegisterInfo &MRI = *getSubtargetImpl()->getRegisterInfo(); in addPassesToEmitFile() 255 const MCRegisterInfo &MRI = *getSubtargetImpl()->getRegisterInfo(); in addPassesToEmitMC()
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H A D | TargetFrameLoweringImpl.cpp | 37 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getFrameIndexReference()
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H A D | RegisterClassInfo.cpp | 40 if (MF->getSubtarget().getRegisterInfo() != TRI) { in runOnMachineFunction() 41 TRI = MF->getSubtarget().getRegisterInfo(); in runOnMachineFunction()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonSubtarget.h | 65 const HexagonRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function 66 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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H A D | HexagonSplitConst32AndConst64.cpp | 142 unsigned DestLo = QTM.getSubtargetImpl()->getRegisterInfo()->getSubReg( in runOnMachineFunction() 144 unsigned DestHi = QTM.getSubtargetImpl()->getRegisterInfo()->getSubReg( in runOnMachineFunction()
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H A D | HexagonCallingConvLower.cpp | 36 (TM.getSubtargetImpl()->getRegisterInfo()->getNumRegs() + 31) / 32); in Hexagon_CCState() 60 const TargetRegisterInfo &TRI = *TM.getSubtargetImpl()->getRegisterInfo(); in MarkAllocated()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/ |
H A D | NVPTXSubtarget.h | 65 const NVPTXRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function 66 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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H A D | NVPTXPrologEpilogPass.cpp | 53 const TargetRegisterInfo &TRI = *TM.getSubtargetImpl()->getRegisterInfo(); in runOnMachineFunction() 113 const TargetRegisterInfo *RegInfo = Fn.getSubtarget().getRegisterInfo(); in calculateFrameObjectOffsets()
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H A D | NVPTXInstrInfo.h | 32 const NVPTXRegisterInfo &getRegisterInfo() const { return RegInfo; } in getRegisterInfo() function
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/minix/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64Subtarget.h | 86 const AArch64RegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function 87 return &getInstrInfo()->getRegisterInfo(); in getRegisterInfo()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsSEFrameLowering.cpp | 152 MF.getSubtarget().getRegisterInfo()); in expandLoadCCond() 172 MF.getSubtarget().getRegisterInfo()); in expandStoreCCond() 195 MF.getSubtarget().getRegisterInfo()); in expandLoadACC() 225 MF.getSubtarget().getRegisterInfo()); in expandStoreACC() 260 MF.getSubtarget().getRegisterInfo()); in expandCopyACC() 309 TM.getSubtargetImpl()->getRegisterInfo()); in expandBuildPairF64() 369 TM.getSubtargetImpl()->getRegisterInfo()); in expandExtractElementF64() 420 MF.getSubtarget().getRegisterInfo()); in emitPrologue() 436 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); in emitPrologue() 555 MF.getSubtarget().getRegisterInfo()); in emitEpilogue()
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H A D | MipsSubtarget.h | 278 const MipsRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function 279 return &InstrInfo->getRegisterInfo(); in getRegisterInfo()
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H A D | MipsSEInstrInfo.cpp | 32 const MipsRegisterInfo &MipsSEInstrInfo::getRegisterInfo() const { in getRegisterInfo() function in MipsSEInstrInfo 446 const MipsRegisterInfo *RI = &getRegisterInfo(); in compareOpndSize() 481 unsigned DstLo = getRegisterInfo().getSubReg(DstReg, Mips::sub_lo); in expandPseudoMTLoHi() 482 unsigned DstHi = getRegisterInfo().getSubReg(DstReg, Mips::sub_hi); in expandPseudoMTLoHi() 503 TmpReg = getRegisterInfo().getSubReg(DstReg, Mips::sub_lo); in expandCvtFPInt() 506 DstReg = getRegisterInfo().getSubReg(DstReg, Mips::sub_lo); in expandCvtFPInt() 522 unsigned SubReg = getRegisterInfo().getSubReg(SrcReg, SubIdx); in expandExtractElementF64() 558 const TargetRegisterInfo &TRI = getRegisterInfo(); in expandBuildPairF64()
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H A D | Mips16FrameLowering.cpp | 48 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo(); in emitPrologue() 178 const MipsRegisterInfo &RI = TII.getRegisterInfo(); in processFunctionBeforeCalleeSavedScan()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/R600/ |
H A D | AMDGPUSubtarget.h | 92 const AMDGPURegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function 93 return &InstrInfo->getRegisterInfo(); in getRegisterInfo()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86MachineFunctionInfo.cpp | 21 MF->getSubtarget().getRegisterInfo()); in setRestoreBasePointer()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMInstrInfo.h | 39 const ARMRegisterInfo &getRegisterInfo() const override { return RI; } in getRegisterInfo() function
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H A D | Thumb1InstrInfo.h | 39 const Thumb1RegisterInfo &getRegisterInfo() const override { return RI; } in getRegisterInfo() function
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/minix/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCSubtarget.h | 165 const PPCRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function 166 return &getInstrInfo()->getRegisterInfo(); in getRegisterInfo()
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/minix/external/bsd/llvm/dist/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64ExternalSymbolizer.cpp | 95 const MCRegisterInfo &MCRI = *Ctx.getRegisterInfo(); in tryAddingSymbolicOperand() 121 const MCRegisterInfo &MCRI = *Ctx.getRegisterInfo(); in tryAddingSymbolicOperand()
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