| /netbsd/external/gpl3/gdb/dist/gdb/testsuite/gdb.cp/ |
| H A D | userdef.cc | 42 A1 operator+(const A1&);
43 A1 operator-(const A1&);
74 A1 A1::operator+(const A1& second) in operator +()
83 A1 A1::operator*(const A1& second) in operator *()
92 A1 A1::operator-(const A1& second) in operator -()
101 A1 A1::operator/(const A1& second) in operator /()
110 A1 A1::operator%(const A1& second) in operator %()
163 A1 A1::operator|(const A1& second) in operator |()
172 A1 A1::operator^(const A1& second) in operator ^()
181 A1 A1::operator&(const A1& second) in operator &()
[all …]
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| /netbsd/external/gpl3/gdb.old/dist/gdb/testsuite/gdb.cp/ |
| H A D | userdef.cc | 42 A1 operator+(const A1&);
43 A1 operator-(const A1&);
74 A1 A1::operator+(const A1& second) in operator +()
83 A1 A1::operator*(const A1& second) in operator *()
92 A1 A1::operator-(const A1& second) in operator -()
101 A1 A1::operator/(const A1& second) in operator /()
110 A1 A1::operator%(const A1& second) in operator %()
163 A1 A1::operator|(const A1& second) in operator |()
172 A1 A1::operator^(const A1& second) in operator ^()
181 A1 A1::operator&(const A1& second) in operator &()
[all …]
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| /netbsd/external/gpl3/gdb/dist/sim/testsuite/sim/bfin/ |
| H A D | random_0027.S | 8 dmm32 A1.w, 0xa605868e;
9 dmm32 A1.x, 0x00000000;
15 checkreg A1.w, 0xa818ff5a;
16 checkreg A1.x, 0x00000000;
20 dmm32 A1.w, 0xeb710132;
21 dmm32 A1.x, 0xffffffcf;
31 dmm32 A1.w, 0x95489ea8;
32 dmm32 A1.x, 0x00000000;
43 dmm32 A1.w, 0xcfa4f43b;
44 dmm32 A1.x, 0x0000006c;
[all …]
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| H A D | random_0028.S | 8 dmm32 A1.w, 0x851fa4fc;
9 dmm32 A1.x, 0x00000000;
15 checkreg A1.w, 0x851fa4fc;
16 checkreg A1.x, 0x00000000;
20 dmm32 A1.w, 0xc5ee7420;
21 dmm32 A1.x, 0x00000000;
32 dmm32 A1.w, 0x965cddab;
33 dmm32 A1.x, 0x00000063;
44 dmm32 A1.w, 0x92315df7;
45 dmm32 A1.x, 0x0000007e;
[all …]
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| H A D | random_0029.S | 8 dmm32 A1.w, 0xdf7ce5c7;
9 dmm32 A1.x, 0xffffff9c;
14 checkreg A1.w, 0xc534e5c7;
15 checkreg A1.x, 0xffffff9c;
19 dmm32 A1.w, 0xdf39474d;
20 dmm32 A1.x, 0xffffffd9;
31 dmm32 A1.w, 0xb0a49eb4;
32 dmm32 A1.x, 0x00000000;
43 dmm32 A1.w, 0x91b35cde;
44 dmm32 A1.x, 0x0000006c;
[all …]
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| H A D | random_0030.S | 8 dmm32 A1.w, 0x8f7fea28;
9 dmm32 A1.x, 0x00000005;
15 checkreg A1.w, 0x8f7fea28;
16 checkreg A1.x, 0x00000005;
20 dmm32 A1.w, 0xbfed6ffc;
21 dmm32 A1.x, 0x00000000;
34 dmm32 A1.w, 0xfffd8001;
35 dmm32 A1.x, 0x00000000;
46 dmm32 A1.w, 0x842fbc0a;
47 dmm32 A1.x, 0x00000000;
[all …]
|
| H A D | random_0036.S | 10 dmm32 A1.w, 0xe0004138;
11 dmm32 A1.x, 0x0000007f;
17 checkreg A1.w, 0xffffffff;
18 checkreg A1.x, 0x0000007f;
24 dmm32 A1.w, 0xf07795da;
25 dmm32 A1.x, 0x0000007f;
40 dmm32 A1.w, 0xbb313d2f;
41 dmm32 A1.x, 0x0000007f;
54 dmm32 A1.w, 0xe0002429;
55 dmm32 A1.x, 0x0000007f;
[all …]
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| H A D | c_dsp32alu_rrpm_aa.s | 23 R0 = A1 + A0, R7 = A1 - A0 (NS);
24 R1 = A0 + A1, R6 = A0 - A1 (NS);
25 R2 = A1 + A0, R5 = A1 - A0 (NS);
26 R3 = A0 + A1, R4 = A0 - A1 (NS);
27 R4 = A1 + A0, R0 = A1 - A0 (NS);
28 R5 = A0 + A1, R1 = A0 - A1 (NS);
29 R6 = A0 + A1, R2 = A0 - A1 (NS);
30 R7 = A1 + A0, R3 = A1 - A0 (NS);
50 R3 = A1 + A0, R7 = A1 - A0 (S);
51 R4 = A0 + A1, R6 = A0 - A1 (S);
[all …]
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| H A D | c_dsp32mac_a1a0_iuw32.s | 13 A1 = 0; define
28 R7 = A1.w;
31 R1 = A1.w;
34 R3 = A1.w;
37 R4 = A1.w;
57 R7 = A1.w;
60 R1 = A1.w;
63 R5 = A1.w;
66 R3 = A1.w;
86 R0 = A1.w;
[all …]
|
| H A D | random_0026.S | 32 dmm32 A1.w, 0xfa400000;
33 dmm32 A1.x, 0xffffffad;
44 dmm32 A1.w, 0xef56cbd3;
45 dmm32 A1.x, 0x00000000;
56 dmm32 A1.w, 0xf54ee9bb;
57 dmm32 A1.x, 0x0000004a;
68 dmm32 A1.w, 0xc1a6b608;
69 dmm32 A1.x, 0x00000056;
79 dmm32 A1.w, 0xe9574334;
80 dmm32 A1.x, 0x00000056;
[all …]
|
| H A D | random_0020.S | 8 dmm32 A1.w, 0xfcdbede4;
9 dmm32 A1.x, 0xffffffff;
14 checkreg A1.w, 0xfcfd2864;
15 checkreg A1.x, 0xffffffff;
19 dmm32 A1.w, 0x0bcd165c;
20 dmm32 A1.x, 0x00000000;
31 dmm32 A1.w, 0x00000000;
32 dmm32 A1.x, 0x00000000;
43 dmm32 A1.w, 0x36491cf0;
44 dmm32 A1.x, 0x00000000;
[all …]
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| H A D | c_dsp32mac_dr_a1_t.s | 11 A1 = A0 = 0; define
23 R1 = A1.w;
25 R3 = A1.w;
27 R5 = A1.w;
29 R7 = A1.w;
49 R1 = A1.w;
51 R3 = A1.w;
53 R5 = A1.w;
55 R7 = A1.w;
75 R1 = A1.w;
[all …]
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| H A D | c_dsp32mac_dr_a1_i.s | 10 A1 = A0 = 0; define
22 R1 = A1.w;
24 R3 = A1.w;
26 R5 = A1.w;
28 R7 = A1.w;
48 R1 = A1.w;
50 R3 = A1.w;
52 R5 = A1.w;
54 R7 = A1.w;
74 R1 = A1.w;
[all …]
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| /netbsd/external/gpl3/gdb.old/dist/sim/testsuite/sim/bfin/ |
| H A D | random_0027.S | 8 dmm32 A1.w, 0xa605868e;
9 dmm32 A1.x, 0x00000000;
15 checkreg A1.w, 0xa818ff5a;
16 checkreg A1.x, 0x00000000;
20 dmm32 A1.w, 0xeb710132;
21 dmm32 A1.x, 0xffffffcf;
31 dmm32 A1.w, 0x95489ea8;
32 dmm32 A1.x, 0x00000000;
43 dmm32 A1.w, 0xcfa4f43b;
44 dmm32 A1.x, 0x0000006c;
[all …]
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| H A D | random_0028.S | 8 dmm32 A1.w, 0x851fa4fc;
9 dmm32 A1.x, 0x00000000;
15 checkreg A1.w, 0x851fa4fc;
16 checkreg A1.x, 0x00000000;
20 dmm32 A1.w, 0xc5ee7420;
21 dmm32 A1.x, 0x00000000;
32 dmm32 A1.w, 0x965cddab;
33 dmm32 A1.x, 0x00000063;
44 dmm32 A1.w, 0x92315df7;
45 dmm32 A1.x, 0x0000007e;
[all …]
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| H A D | random_0029.S | 8 dmm32 A1.w, 0xdf7ce5c7;
9 dmm32 A1.x, 0xffffff9c;
14 checkreg A1.w, 0xc534e5c7;
15 checkreg A1.x, 0xffffff9c;
19 dmm32 A1.w, 0xdf39474d;
20 dmm32 A1.x, 0xffffffd9;
31 dmm32 A1.w, 0xb0a49eb4;
32 dmm32 A1.x, 0x00000000;
43 dmm32 A1.w, 0x91b35cde;
44 dmm32 A1.x, 0x0000006c;
[all …]
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| H A D | random_0030.S | 8 dmm32 A1.w, 0x8f7fea28;
9 dmm32 A1.x, 0x00000005;
15 checkreg A1.w, 0x8f7fea28;
16 checkreg A1.x, 0x00000005;
20 dmm32 A1.w, 0xbfed6ffc;
21 dmm32 A1.x, 0x00000000;
34 dmm32 A1.w, 0xfffd8001;
35 dmm32 A1.x, 0x00000000;
46 dmm32 A1.w, 0x842fbc0a;
47 dmm32 A1.x, 0x00000000;
[all …]
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| H A D | random_0036.S | 10 dmm32 A1.w, 0xe0004138;
11 dmm32 A1.x, 0x0000007f;
17 checkreg A1.w, 0xffffffff;
18 checkreg A1.x, 0x0000007f;
24 dmm32 A1.w, 0xf07795da;
25 dmm32 A1.x, 0x0000007f;
40 dmm32 A1.w, 0xbb313d2f;
41 dmm32 A1.x, 0x0000007f;
54 dmm32 A1.w, 0xe0002429;
55 dmm32 A1.x, 0x0000007f;
[all …]
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| H A D | c_dsp32alu_rrpm_aa.s | 23 R0 = A1 + A0, R7 = A1 - A0 (NS);
24 R1 = A0 + A1, R6 = A0 - A1 (NS);
25 R2 = A1 + A0, R5 = A1 - A0 (NS);
26 R3 = A0 + A1, R4 = A0 - A1 (NS);
27 R4 = A1 + A0, R0 = A1 - A0 (NS);
28 R5 = A0 + A1, R1 = A0 - A1 (NS);
29 R6 = A0 + A1, R2 = A0 - A1 (NS);
30 R7 = A1 + A0, R3 = A1 - A0 (NS);
50 R3 = A1 + A0, R7 = A1 - A0 (S);
51 R4 = A0 + A1, R6 = A0 - A1 (S);
[all …]
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| H A D | c_dsp32mac_a1a0_iuw32.s | 13 A1 = 0; define
28 R7 = A1.w;
31 R1 = A1.w;
34 R3 = A1.w;
37 R4 = A1.w;
57 R7 = A1.w;
60 R1 = A1.w;
63 R5 = A1.w;
66 R3 = A1.w;
86 R0 = A1.w;
[all …]
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| H A D | random_0026.S | 32 dmm32 A1.w, 0xfa400000;
33 dmm32 A1.x, 0xffffffad;
44 dmm32 A1.w, 0xef56cbd3;
45 dmm32 A1.x, 0x00000000;
56 dmm32 A1.w, 0xf54ee9bb;
57 dmm32 A1.x, 0x0000004a;
68 dmm32 A1.w, 0xc1a6b608;
69 dmm32 A1.x, 0x00000056;
79 dmm32 A1.w, 0xe9574334;
80 dmm32 A1.x, 0x00000056;
[all …]
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| H A D | random_0020.S | 8 dmm32 A1.w, 0xfcdbede4;
9 dmm32 A1.x, 0xffffffff;
14 checkreg A1.w, 0xfcfd2864;
15 checkreg A1.x, 0xffffffff;
19 dmm32 A1.w, 0x0bcd165c;
20 dmm32 A1.x, 0x00000000;
31 dmm32 A1.w, 0x00000000;
32 dmm32 A1.x, 0x00000000;
43 dmm32 A1.w, 0x36491cf0;
44 dmm32 A1.x, 0x00000000;
[all …]
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| H A D | c_dsp32mac_dr_a1_i.s | 10 A1 = A0 = 0; define
22 R1 = A1.w;
24 R3 = A1.w;
26 R5 = A1.w;
28 R7 = A1.w;
48 R1 = A1.w;
50 R3 = A1.w;
52 R5 = A1.w;
54 R7 = A1.w;
74 R1 = A1.w;
[all …]
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| /netbsd/external/gpl3/gdb/dist/gas/testsuite/gas/bfin/ |
| H A D | move2.s | 30 A1.X = A1.X;
31 A1.W = A1.W;
34 R0 = A1.W;
35 R1 = A1.X;
54 A1.X = R1;
55 A1.W = R0;
61 A1.X = A1.W;
69 A1.W = A1.W;
113 A1.X = I2;
114 A1.W = I3;
[all …]
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| /netbsd/external/gpl3/gdb.old/dist/gas/testsuite/gas/bfin/ |
| H A D | move2.s | 30 A1.X = A1.X;
31 A1.W = A1.W;
34 R0 = A1.W;
35 R1 = A1.X;
54 A1.X = R1;
55 A1.W = R0;
61 A1.X = A1.W;
69 A1.W = A1.W;
113 A1.X = I2;
114 A1.W = I3;
[all …]
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