| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 1325 static inline bool isZeroOrAllOnes(SDValue N, bool AllOnes) { in isZeroOrAllOnes() argument
1326 return AllOnes ? isAllOnesConstant(N) : isNullConstant(N); in isZeroOrAllOnes()
1357 if (isZeroOrAllOnes(N1, AllOnes)) { in isConditionalZeroOrAllOnes()
1362 if (isZeroOrAllOnes(N2, AllOnes)) { in isConditionalZeroOrAllOnes()
1371 if (AllOnes) in isConditionalZeroOrAllOnes()
1388 Invert = !AllOnes; in isConditionalZeroOrAllOnes()
1389 if (AllOnes) in isConditionalZeroOrAllOnes()
1420 bool AllOnes) { in combineSelectAndUse() argument
1444 bool AllOnes) { in combineSelectAndUseCommutative() argument
1448 if (SDValue Result = combineSelectAndUse(N, N0, N1, DCI, AllOnes)) in combineSelectAndUseCommutative()
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| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/ADT/ |
| H A D | Bitfields.h | 107 static constexpr Unsigned AllOnes = ~Unsigned(0); // 11111111 member
109 static constexpr Unsigned Umax = AllOnes >> (TypeBits - Bits); // 00111111
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineShifts.cpp | 1005 Constant *AllOnes = ConstantInt::getAllOnesValue(Ty); in visitShl() local
1006 Value *Mask = Builder.CreateShl(AllOnes, Op1); in visitShl()
1183 Constant *AllOnes = ConstantInt::getAllOnesValue(Ty); in visitLShr() local
1184 Value *Mask = Builder.CreateLShr(AllOnes, Op1); in visitLShr()
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| H A D | InstCombineSimplifyDemanded.cpp | 746 APInt AllOnes = APInt::getAllOnesValue(BitWidth); in SimplifyDemandedUseBits() local
747 if (SimplifyDemandedBits(I, 0, AllOnes, Known2, Depth + 1) || in SimplifyDemandedUseBits()
748 SimplifyDemandedBits(I, 1, AllOnes, Known2, Depth + 1)) in SimplifyDemandedUseBits()
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| H A D | InstCombineAndOrXor.cpp | 2921 Value *AllOnes = ConstantInt::getAllOnesValue(Ty); in visitOr() local
2922 return SelectInst::Create(NewICmpInst, AllOnes, X); in visitOr()
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| H A D | InstCombineCompares.cpp | 5666 Constant *AllOnes = Constant::getAllOnesValue(Op0->getType()); in visitICmpInst() local
5667 return new ICmpInst(ICmpInst::ICMP_SGT, Op0, AllOnes); in visitICmpInst()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 962 SDValue AllOnes = DAG.getConstant( in ExpandSELECT() local
964 SDValue NotMask = DAG.getNode(ISD::XOR, DL, MaskTy, Mask, AllOnes); in ExpandSELECT()
1204 SDValue AllOnes = DAG.getConstant( in ExpandVSELECT() local
1206 SDValue NotMask = DAG.getNode(ISD::XOR, DL, VT, Mask, AllOnes); in ExpandVSELECT()
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| H A D | DAGCombiner.cpp | 3961 SDValue AllOnes = DAG.getAllOnesConstant(DL, LegalSVT); in visitMUL() local
3962 SmallVector<SDValue, 16> Mask(NumElts, AllOnes); in visitMUL()
4229 SDValue AllOnes = DAG.getAllOnesConstant(DL, VT); in visitSDIVLike() local
4231 SDValue IsAllOnes = DAG.getSetCC(DL, CCVT, N1, AllOnes, ISD::SETEQ); in visitSDIVLike()
6998 SDValue AllOnes = DAG.getAllOnesConstant(DL, VT); in MatchRotate() local
6999 SDValue Mask = AllOnes; in MatchRotate()
7002 SDValue RHSBits = DAG.getNode(ISD::SRL, DL, VT, AllOnes, RHSShiftAmt); in MatchRotate()
7007 SDValue LHSBits = DAG.getNode(ISD::SHL, DL, VT, AllOnes, LHSShiftAmt); in MatchRotate()
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| H A D | TargetLowering.cpp | 8006 SDValue AllOnes = DAG.getAllOnesConstant(dl, VT); in expandAddSubSat() local
8015 return DAG.getSelect(dl, VT, Overflow, AllOnes, SumDiff); in expandAddSubSat()
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| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/IR/ |
| H A D | ModuleSummaryIndexYAML.h | 25 io.enumCase(value, "AllOnes", TypeTestResolution::AllOnes);
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| H A D | ModuleSummaryIndex.h | 914 AllOnes, ///< All-ones bit vector ("Eliminating Bit Vector Checks for
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/IPO/ |
| H A D | LowerTypeTests.cpp | 782 if (TIL.TheKind == TypeTestResolution::AllOnes) in lowerTypeTestCall()
935 TIL.TheKind == TypeTestResolution::AllOnes) { in exportTypeId()
1016 TIL.TheKind == TypeTestResolution::AllOnes) { in importTypeId()
1144 : TypeTestResolution::AllOnes; in lowerTypeTestCalls()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 5765 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v8i8, AllOnes); in LowerFCOPYSIGN()
8122 SDValue AllOnes = in PromoteMVEPredVector() local
8124 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v16i8, AllOnes); in PromoteMVEPredVector()
11761 static inline bool isZeroOrAllOnes(SDValue N, bool AllOnes) { in isZeroOrAllOnes() argument
11762 return AllOnes ? isAllOnesConstant(N) : isNullConstant(N); in isZeroOrAllOnes()
11787 if (isZeroOrAllOnes(N1, AllOnes)) { in isConditionalZeroOrAllOnes()
11792 if (isZeroOrAllOnes(N2, AllOnes)) { in isConditionalZeroOrAllOnes()
11801 if (AllOnes) in isConditionalZeroOrAllOnes()
11810 Invert = !AllOnes; in isConditionalZeroOrAllOnes()
11811 if (AllOnes) in isConditionalZeroOrAllOnes()
[all …]
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 5431 SelectionDAG &DAG, bool AllOnes) { in combineSelectCCAndUse() argument
5437 auto isZeroOrAllOnes = [](SDValue N, bool AllOnes) { in combineSelectCCAndUse() argument
5438 return AllOnes ? isAllOnesConstant(N) : isNullConstant(N); in combineSelectCCAndUse()
5445 if (isZeroOrAllOnes(TrueVal, AllOnes)) { in combineSelectCCAndUse()
5448 } else if (isZeroOrAllOnes(FalseVal, AllOnes)) { in combineSelectCCAndUse()
5468 bool AllOnes) { in combineSelectCCAndUseCommutative() argument
5471 if (SDValue Result = combineSelectCCAndUse(N, N0, N1, DAG, AllOnes)) in combineSelectCCAndUseCommutative()
5473 if (SDValue Result = combineSelectCCAndUse(N, N1, N0, DAG, AllOnes)) in combineSelectCCAndUseCommutative()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 897 SDValue AllOnes = in PreprocessISelDAG() local
899 AllOnes = CurDAG->getBitcast(VT, AllOnes); in PreprocessISelDAG()
903 CurDAG->getNode(NewOpcode, DL, VT, N->getOperand(0), AllOnes); in PreprocessISelDAG()
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| H A D | X86ISelLowering.cpp | 11916 SDValue Zero, AllOnes; in lowerShuffleAsBitMask() local
11928 AllOnes = DAG.getConstantFP(AllOnesValue, DL, EltVT); in lowerShuffleAsBitMask()
11933 AllOnes = DAG.getAllOnesConstant(DL, EltVT); in lowerShuffleAsBitMask()
11948 VMaskOps[i] = AllOnes; in lowerShuffleAsBitMask()
11971 SDValue AllOnes = DAG.getAllOnesConstant(DL, EltVT); in lowerShuffleAsBitBlend() local
11976 MaskOps.push_back(Mask[i] < Size ? AllOnes : Zero); in lowerShuffleAsBitBlend()
36101 APInt AllOnes = APInt::getAllOnesValue(MaskEltSizeInBits); in combineX86ShuffleChain() local
36112 EltBits[i] = AllOnes; in combineX86ShuffleChain()
44436 SDValue AllOnes = DAG.getAllOnesConstant(dl, VT); in combineAndLoadToBZHI() local
44437 SDValue LShr = DAG.getNode(ISD::SRL, dl, VT, AllOnes, Sub); in combineAndLoadToBZHI()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Instrumentation/ |
| H A D | MemorySanitizer.cpp | 1665 Value *AllOnes = PoisonUndef ? getPoisonedShadow(V) : getCleanShadow(V); in getShadow() local
1666 LLVM_DEBUG(dbgs() << "Undef: " << *U << " ==> " << *AllOnes << "\n"); in getShadow()
1668 return AllOnes; in getShadow()
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| /netbsd/external/apache2/llvm/dist/llvm/utils/TableGen/ |
| H A D | GlobalISelEmitter.cpp | 2167 AllOnes enumerator
2188 if (Kind == AllOnes) in emitPredicateOpcodes()
4372 ImmAllOnesV ? VectorSplatImmPredicateMatcher::AllOnes in importChildMatcher()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/IR/ |
| H A D | Instructions.cpp | 2615 Constant *AllOnes = Constant::getAllOnesValue(Op->getType()); in CreateNot() local
2616 return new BinaryOperator(Instruction::Xor, Op, AllOnes, in CreateNot()
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| H A D | AsmWriter.cpp | 3017 case TypeTestResolution::AllOnes: in getTTResKindName()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/AsmParser/ |
| H A D | LLParser.cpp | 8214 TTRes.TheKind = TypeTestResolution::AllOnes; in parseTypeTestResolution()
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