Searched refs:BL1 (Results 1 – 1 of 1) sorted by relevance
46 #define BL1 1 macro51 #define BL1 2 macro57 #define OSIOP_SCNTL1 (0x00+BL1) /* rw: SCSI control reg 1 */62 #define OSIOP_SXFER (0x04+BL1) /* rw: SCSI Transfer reg */67 #define OSIOP_SIDL (0x08+BL1) /* ro: SCSI Input Data Latch */72 #define OSIOP_SSTAT0 (0x0c+BL1) /* ro: SCSI status reg 0 */79 #define OSIOP_CTEST1 (0x14+BL1) /* ro: Chip test register 1 */84 #define OSIOP_CTEST5 (0x18+BL1) /* rw: Chip test register 5 */91 #define OSIOP_ISTAT (0x20+BL1) /* rw: Interrupt Status reg */97 #define OSIOP_DBC1 (0x24+BL1) /* rw: DMA Byte Counter reg 1 */[all …]