| /netbsd/external/gpl3/gdb/dist/sim/testsuite/sim/m32r/ |
| H A D | ChangeLog | 87 * bltz.cgs: Test BLTZ instruction.
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| /netbsd/external/gpl3/gdb.old/dist/sim/testsuite/sim/m32r/ |
| H A D | ChangeLog | 87 * bltz.cgs: Test BLTZ instruction.
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.cpp | 300 case Mips::BLTZ: case Mips::BLTZ64: in isBranchOffsetInRange()
517 case Mips::BLTZ: in getEquivalentCompactForm()
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| H A D | MipsSEInstrInfo.cpp | 510 case Mips::BGEZ: return Mips::BLTZ; in getOppositeBranchOpc()
511 case Mips::BLTZ: return Mips::BGEZ; in getOppositeBranchOpc()
662 Opc == Mips::BLTZ || Opc == Mips::BLEZ || Opc == Mips::BEQ64 || in getAnalyzableBrOpc()
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| H A D | MipsScheduleP5600.td | 73 BGEZALL, BGEZL, BGTZ, BGTZL, BLEZ, BLEZL, BLTZ,
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| H A D | MipsScheduleGeneric.td | 287 BLEZ, BLTZ, BLTZAL, J, JALX, JR, JR_HB, ERET,
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| H A D | MipsInstrInfo.td | 2240 def BLTZ : MMRel, CBranchZero<"bltz", brtarget, setlt, GPR32Opnd>,
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| /netbsd/sys/external/bsd/sljit/dist/sljit_src/ |
| H A D | sljitNativeMIPS_common.c | 109 #define BLTZ (HI(1) | (0 << 16)) macro
1758 inst = BLTZ; in sljit_emit_cmp()
1772 inst = BLTZ; in sljit_emit_cmp()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 1912 case Mips::BLTZ: in processInstruction()
3984 ZeroTrgOpcode = Mips::BLTZ; in expandCondBranches()
4019 ZeroSrcOpcode = Mips::BLTZ; in expandCondBranches()
4033 TOut.emitRX(Mips::BLTZ, Mips::ZERO, MCOperand::createExpr(OffsetExpr), in expandCondBranches()
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| /netbsd/external/gpl3/binutils/dist/cpu/ |
| H A D | iq2000.cpu | 256 …(("BLTZ" 0) ("BGEZ" 1) ("BLTZL" 2) ("BGEZL" 3) ("BLEZ" 4) ("BGTZ" 5) ("BLEZL" …
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| /netbsd/external/gpl3/gdb/dist/cpu/ |
| H A D | iq2000.cpu | 256 …(("BLTZ" 0) ("BGEZ" 1) ("BLTZL" 2) ("BGEZL" 3) ("BLEZ" 4) ("BGTZ" 5) ("BLEZL" …
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| /netbsd/external/gpl3/binutils.old/dist/cpu/ |
| H A D | iq2000.cpu | 256 …(("BLTZ" 0) ("BGEZ" 1) ("BLTZL" 2) ("BGEZL" 3) ("BLEZ" 4) ("BGTZ" 5) ("BLEZL" …
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| /netbsd/external/gpl3/gdb.old/dist/cpu/ |
| H A D | iq2000.cpu | 256 …(("BLTZ" 0) ("BGEZ" 1) ("BLTZL" 2) ("BGEZL" 3) ("BLEZ" 4) ("BGTZ" 5) ("BLEZL" …
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| /netbsd/external/gpl3/gdb/dist/opcodes/ |
| H A D | nds32-asm.c | 319 {"bltz", "%rt,%i16s1", BR2 (BLTZ), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
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| /netbsd/external/gpl3/binutils.old/dist/opcodes/ |
| H A D | nds32-asm.c | 319 {"bltz", "%rt,%i16s1", BR2 (BLTZ), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
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| /netbsd/external/gpl3/binutils/dist/opcodes/ |
| H A D | nds32-asm.c | 319 {"bltz", "%rt,%i16s1", BR2 (BLTZ), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
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| /netbsd/external/gpl3/gdb.old/dist/opcodes/ |
| H A D | nds32-asm.c | 319 {"bltz", "%rt,%i16s1", BR2 (BLTZ), 4, ATTR_PCREL | ATTR_ALL, 0, NULL, 0, NULL},
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| /netbsd/external/gpl3/gdb/dist/sim/mips/ |
| H A D | micromips.igen | 784 010000,00000,5.RS,16.IMMEDIATE:POOL32I:32::BLTZ
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| H A D | mips.igen | 2159 000001,5.RS,00000,16.OFFSET:REGIMM:32::BLTZ
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| /netbsd/external/gpl3/gdb.old/dist/sim/mips/ |
| H A D | micromips.igen | 784 010000,00000,5.RS,16.IMMEDIATE:POOL32I:32::BLTZ
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| H A D | mips.igen | 2159 000001,5.RS,00000,16.OFFSET:REGIMM:32::BLTZ
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| /netbsd/external/gpl3/gdb/dist/gdb/ |
| H A D | ChangeLog-2011 | 720 of BLTZ* and BGEZ* instructions.
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| /netbsd/external/gpl3/gdb.old/dist/gdb/ |
| H A D | ChangeLog-2011 | 720 of BLTZ* and BGEZ* instructions.
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