| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86LowerAMXType.cpp | 171 Use &U = *(Bitcast->use_begin()); in combineLoadBitcast()
175 IRBuilder<> Builder(Bitcast); in combineLoadBitcast()
210 if (Bitcast->hasOneUse()) in combineBitcastStore()
222 Bitcast->replaceAllUsesWith(Vec); in combineBitcastStore()
227 IRBuilder<> Builder(Bitcast); in transformBitcast()
230 auto *Src = Bitcast->getOperand(0); in transformBitcast()
247 Use &U = *(Bitcast->use_begin()); in transformBitcast()
293 if (!Bitcast) in visit()
298 if (Bitcast->user_empty()) { in visit()
329 if (Bitcast->user_empty()) { in visit()
[all …]
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/IPO/ |
| H A D | Annotation2Metadata.cpp | 60 auto *Bitcast = dyn_cast<ConstantExpr>(OpC->getOperand(0)); in convertAnnotation2Metadata() local
61 if (!Bitcast || Bitcast->getOpcode() != Instruction::BitCast) in convertAnnotation2Metadata()
63 auto *Fn = dyn_cast<Function>(Bitcast->getOperand(0)); in convertAnnotation2Metadata()
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| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 161 Bitcast, enumerator
339 bool isBitcast() const { return Flags & (1ULL << MCID::Bitcast); } in isBitcast()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUPreLegalizerCombiner.cpp | 143 auto Bitcast = B.buildBitcast({S32}, CvtPk); in applyClampI64ToI16() local
147 {MinBoundaryDst.getReg(0), Bitcast.getReg(0), MaxBoundaryDst.getReg(0)}, in applyClampI64ToI16()
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| H A D | AMDGPURegisterBankInfo.cpp | 1612 auto Bitcast = B.buildBitcast(S32, Src); in unpackV2S16ToS32() local
1615 auto ExtLo = B.buildSExtInReg(S32, Bitcast, 16); in unpackV2S16ToS32()
1616 auto ShiftHi = B.buildAShr(S32, Bitcast, B.buildConstant(S32, 16)); in unpackV2S16ToS32()
1620 auto ShiftHi = B.buildLShr(S32, Bitcast, B.buildConstant(S32, 16)); in unpackV2S16ToS32()
1622 auto ExtLo = B.buildAnd(S32, Bitcast, B.buildConstant(S32, 0xffff)); in unpackV2S16ToS32()
1627 return std::make_pair(Bitcast.getReg(0), ShiftHi.getReg(0)); in unpackV2S16ToS32()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 439 auto Bitcast = MIRBuilder.buildMerge(s64, {Src, C_HiMask.getReg(0)}); in legalizeCustom() local
445 MIRBuilder.buildFSub(Dst, Bitcast, TwoP52FP); in legalizeCustom()
447 MachineInstrBuilder ResF64 = MIRBuilder.buildFSub(s64, Bitcast, TwoP52FP); in legalizeCustom()
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| H A D | MipsISelLowering.cpp | 4970 Register Bitcast = MRI.createVirtualRegister(&Mips::MSA128WRegClass); in emitSTR_D() local
4973 BuildMI(*BB, I, DL, TII->get(Mips::COPY)).addDef(Bitcast).addUse(StoreVal); in emitSTR_D()
4976 .addUse(Bitcast) in emitSTR_D()
4980 .addUse(Bitcast) in emitSTR_D()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerInfo.cpp | 62 case Bitcast: in operator <<()
181 case Bitcast: { in mutationIsSane()
579 case Bitcast: in findAction()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/ |
| H A D | CodeExtractor.cpp | 549 Instruction *Bitcast = cast<Instruction>(U); in findAllocas() local
550 for (User *BU : Bitcast->users()) { in findAllocas()
562 << *Bitcast << " in out-of-region lifetime marker " in findAllocas()
582 Instruction *Bitcast = cast<Instruction>(U); in findAllocas() local
583 LifetimeMarkerInfo LMI = getLifetimeMarkers(CEAC, Bitcast, ExitBlock); in findAllocas()
585 Bitcasts.push_back(Bitcast); in findAllocas()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/ |
| H A D | LoadStoreVectorizer.cpp | 1252 Value *Bitcast = in vectorizeLoadChain() local
1255 Builder.CreateAlignedLoad(VecTy, Bitcast, MaybeAlign(Alignment)); in vectorizeLoadChain()
1282 if (Instruction *BitcastInst = dyn_cast<Instruction>(Bitcast)) in vectorizeLoadChain()
1300 if (Instruction *BitcastInst = dyn_cast<Instruction>(Bitcast)) in vectorizeLoadChain()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Coroutines/ |
| H A D | Coroutines.cpp | 117 auto *Bitcast = in makeSubFnCall() local
119 return Bitcast; in makeSubFnCall()
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| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizerInfo.h | 72 Bitcast, enumerator
600 return actionIf(LegalizeAction::Bitcast, Predicate, Mutation); in bitcastIf()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 959 auto Bitcast = MIRBuilder.buildBitcast(NewTy, ValReg); in legalizeLoadStore() local
960 MIRBuilder.buildStore(Bitcast.getReg(0), MI.getOperand(1), MMO); in legalizeLoadStore()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2063 SDValue Bitcast = N->getOperand(0); in performVECTOR_SHUFFLECombine() local
2064 if (Bitcast.getOpcode() != ISD::BITCAST) in performVECTOR_SHUFFLECombine()
2068 SDValue CastOp = Bitcast.getOperand(0); in performVECTOR_SHUFFLECombine()
2070 MVT DstType = Bitcast.getSimpleValueType(); in performVECTOR_SHUFFLECombine()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCompares.cpp | 2777 auto *Bitcast = dyn_cast<BitCastInst>(Cmp.getOperand(0)); in foldICmpBitCast() local
2778 if (!Bitcast) in foldICmpBitCast()
2783 Value *BCSrcOp = Bitcast->getOperand(0); in foldICmpBitCast()
2786 if (Bitcast->getSrcTy()->getScalarSizeInBits() == in foldICmpBitCast()
2787 Bitcast->getDestTy()->getScalarSizeInBits()) { in foldICmpBitCast()
2823 if (match(Op1, m_APInt(C)) && Bitcast->hasOneUse() && in foldICmpBitCast()
2851 if (Bitcast->getType()->isPointerTy() && in foldICmpBitCast()
2871 !Bitcast->getType()->isIntegerTy() || in foldICmpBitCast()
2872 !Bitcast->getSrcTy()->isIntOrIntVectorTy()) in foldICmpBitCast()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Instrumentation/ |
| H A D | HWAddressSanitizer.cpp | 1308 auto *Bitcast = new BitCastInst(NewAI, AI->getType(), "", AI); in sanitizeFunction() local
1309 AI->replaceAllUsesWith(Bitcast); in sanitizeFunction()
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| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 899 return hasProperty(MCID::Bitcast, Type);
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrPrefix.td | 2725 (VINSWRX $vDi, InsertEltShift.Sub32Left2, Bitcast.FltToInt)>;
2734 (VINSDRX $vDi, InsertEltShift.Left3, Bitcast.DblToLong)>;
2768 (VINSWLX $vDi, $rB, Bitcast.FltToInt)>;
2807 (VINSWLX $vDi, InsertEltShift.Sub32Left2, Bitcast.FltToInt)>;
2816 (VINSDLX $vDi, InsertEltShift.Left3, Bitcast.DblToLong)>;
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| H A D | PPCISelLowering.cpp | 14876 SDNode *Bitcast = *Trunc->use_begin(); in PerformDAGCombine() local
14879 if (Bitcast->getOpcode() != ISD::BITCAST || in PerformDAGCombine()
14880 Bitcast->getValueType(0) != MVT::f32) in PerformDAGCombine()
14887 std::swap(Bitcast, Bitcast2); in PerformDAGCombine()
14921 DCI.CombineTo(Bitcast, FloatLoad2); in PerformDAGCombine()
16720 SDValue Bitcast = DCI.DAG.getBitcast(MVT::v2i64, Op0.getOperand(0)); in combineTRUNCATE() local
16722 ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64, Bitcast, in combineTRUNCATE()
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| H A D | PPCInstrVSX.td | 1818 def Bitcast {
3459 def : Pat<(i32 (bitconvert f32:$A)), Bitcast.FltToInt>;
3469 def : Pat<(i64 (bitconvert f64:$A)), Bitcast.DblToLong>;
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| /netbsd/external/apache2/llvm/dist/llvm/docs/GlobalISel/ |
| H A D | GenericOpcode.rst | 157 definition of the :ref:`LLVM-IR Bitcast Instruction <i_bitcast>`. It
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| /netbsd/external/apache2/llvm/dist/clang/include/clang/Basic/ |
| H A D | BuiltinsNVPTX.def | 399 // Bitcast
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2088 SDValue Bitcast = DAG.getNode(ISD::BITCAST, SL, MVT::i32, A); in LowerFROUND32() local
2090 SDValue Sign = DAG.getNode(ISD::AND, SL, MVT::i32, Bitcast, in LowerFROUND32()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMInstrVFP.td | 1166 // Bitcast i32 -> f32. NEON prefers to use VMOVDRR.
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| H A D | ARMISelLowering.cpp | 16377 SDValue Bitcast = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, VQMOVN); in PerformMinMaxCombine() local
16378 return DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Bitcast, in PerformMinMaxCombine()
16418 SDValue Bitcast = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, VQMOVN); in PerformMinMaxCombine() local
16419 return DAG.getNode(ISD::AND, DL, VT, Bitcast, in PerformMinMaxCombine()
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