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Searched refs:CC (Results 1 – 25 of 1565) sorted by relevance

12 3 4 5 6 7 8 9 10 >>...63

/netbsd/external/gpl3/gdb/dist/gas/testsuite/gas/bfin/
H A D	control_code2.s	`10 CC = R7 == R0; define 11 CC = R6 == R1; define 12 CC = R0 == R7; define 16 CC = R7 == 3; define 18 CC = R0 == 3; define 144 R7 = CC; 145 R0 = CC; 148 AZ = CC; 149 AN = CC; 150 AC0= CC; [all …]`
H A D	control_code2.d	`7 0: 07 08 CC = R7 == R0; 8 2: 0e 08 CC = R6 == R1; 9 4: 38 08 CC = R0 == R7; 14 e: 87 08 CC = R7 < R0; 15 10: 86 08 CC = R6 < R0; 16 12: 8f 08 CC = R7 < R1; 17 14: b9 08 CC = R1 < R7; 99 b8: 07 02 R7 = CC; 100 ba: 00 02 R0 = CC; 101 bc: 80 03 AZ = CC; [all …]`
H A D	control_code.d	`7 0: 06 08 CC = R6 == R0; 8 2: 17 08 CC = R7 == R2; 10 6: 88 08 CC = R0 < R1; 37 30: 00 02 R0 = CC; 39 34: 80 03 AZ = CC; 40 36: 81 03 AN = CC; 43 3c: 98 03 V = CC; 49 48: 0c 02 CC = R4; 50 4a: 00 03 CC = AZ; 54 52: 18 03 CC = V; [all …]`
/netbsd/external/gpl3/gdb.old/dist/gas/testsuite/gas/bfin/
H A D	control_code2.s	`10 CC = R7 == R0; define 11 CC = R6 == R1; define 12 CC = R0 == R7; define 16 CC = R7 == 3; define 18 CC = R0 == 3; define 144 R7 = CC; 145 R0 = CC; 148 AZ = CC; 149 AN = CC; 150 AC0= CC; [all …]`
H A D	control_code2.d	`7 0: 07 08 CC = R7 == R0; 8 2: 0e 08 CC = R6 == R1; 9 4: 38 08 CC = R0 == R7; 14 e: 87 08 CC = R7 < R0; 15 10: 86 08 CC = R6 < R0; 16 12: 8f 08 CC = R7 < R1; 17 14: b9 08 CC = R1 < R7; 99 b8: 07 02 R7 = CC; 100 ba: 00 02 R0 = CC; 101 bc: 80 03 AZ = CC; [all …]`
/netbsd/external/gpl3/gdb/dist/sim/testsuite/sim/bfin/
H A D	c_logi2op_nbittst.s	`23 R1 = CC; 25 R2 = CC; 28 R3 = CC; 31 R4 = CC; 39 R2 = CC; 42 R3 = CC; 45 R4 = CC; 48 R5 = CC; 56 R3 = CC; 59 R4 = CC; [all …]`
H A D	c_logi2op_bittst.s	`22 R1 = CC; 24 R2 = CC; 27 R3 = CC; 30 R4 = CC; 38 R2 = CC; 41 R3 = CC; 44 R4 = CC; 47 R5 = CC; 55 R3 = CC; 58 R4 = CC; [all …]`
H A D	a9.s	18 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 19 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 20 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 21 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define 22 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 32 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 33 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 34 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 35 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define 36 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
H A D	s14.s	23 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 24 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 25 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 26 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 27 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 39 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 40 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 41 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 42 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 43 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
H A D	a10.s	19 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 20 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 21 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 22 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define 23 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 33 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 34 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 35 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 36 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define 37 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
H A D	c_ccflag_pr_imm3.s	`23 CC = P1 == 1; define 25 CC = P1 < 1; define 27 CC = P1 <= 1; define 29 CC = P2 == 2; define 31 CC = P2 < 2; define 33 CC = P2 <= 2; define 42 CC = P3 == 3; define 44 CC = P3 < 3; define 50 CC = P4 < 1; define 63 CC = P5 < 2; define [all …]`
H A D	s13.s	18 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 19 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 20 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 21 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 22 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 33 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 34 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 35 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 36 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 37 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
H A D	s9.s	17 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 18 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 19 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 20 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 21 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 30 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 31 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 32 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 33 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 34 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
H A D	s18.s	21 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define 22 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 23 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 24 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 25 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 36 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 37 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 38 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 39 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 51 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
H A D	s19.s	22 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define 23 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 24 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 25 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 26 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 38 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 39 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 40 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 41 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 54 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
/netbsd/external/gpl3/gdb.old/dist/sim/testsuite/sim/bfin/
H A D	c_logi2op_bittst.s	`22 R1 = CC; 24 R2 = CC; 27 R3 = CC; 30 R4 = CC; 38 R2 = CC; 41 R3 = CC; 44 R4 = CC; 47 R5 = CC; 55 R3 = CC; 58 R4 = CC; [all …]`
H A D	c_logi2op_nbittst.s	`23 R1 = CC; 25 R2 = CC; 28 R3 = CC; 31 R4 = CC; 39 R2 = CC; 42 R3 = CC; 45 R4 = CC; 48 R5 = CC; 56 R3 = CC; 59 R4 = CC; [all …]`
H A D	a9.s	18 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 19 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 20 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 21 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define 22 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 32 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 33 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 34 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 35 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define 36 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
H A D	s14.s	23 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 24 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 25 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 26 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 27 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 39 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 40 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 41 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 42 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 43 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
H A D	a10.s	19 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 20 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 21 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 22 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define 23 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 33 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 34 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 35 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 36 CC = V; R7 = CC; DBGA ( R7.L , 0x0 ); define 37 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
H A D	c_ccflag_pr_imm3.s	`23 CC = P1 == 1; define 25 CC = P1 < 1; define 27 CC = P1 <= 1; define 29 CC = P2 == 2; define 31 CC = P2 < 2; define 33 CC = P2 <= 2; define 42 CC = P3 == 3; define 44 CC = P3 < 3; define 50 CC = P4 < 1; define 63 CC = P5 < 2; define [all …]`
H A D	s13.s	18 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 19 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 20 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 21 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 22 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 33 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 34 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 35 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 36 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 37 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
H A D	s9.s	17 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 18 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 ); define 19 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 20 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 21 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 30 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 31 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 32 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 33 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 34 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
H A D	s18.s	21 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define 22 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 23 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 24 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 25 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 36 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 37 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 38 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 39 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 51 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]
H A D	s19.s	22 CC = AZ; R7 = CC; DBGA ( R7.L , 0x1 ); define 23 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 24 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 25 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 26 CC = AV1; R7 = CC; DBGA ( R7.L , 0x0 ); define 38 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define 39 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 ); define 40 CC = AC0; R7 = CC; DBGA ( R7.L , 0x0 ); define 41 CC = AV0; R7 = CC; DBGA ( R7.L , 0x0 ); define 54 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 ); define [all …]

12 3 4 5 6 7 8 9 10 >>...63