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Searched refs:CGTS_CU4_SP0_CTRL_REG__SP00_MASK (Results 1 – 6 of 6) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h9713 #define CGTS_CU4_SP0_CTRL_REG__SP00_MASK 0x7f macro
H A Dgfx_8_1_sh_mask.h11835 #define CGTS_CU4_SP0_CTRL_REG__SP00_MASK 0x7f macro
H A Dgfx_8_0_sh_mask.h11437 #define CGTS_CU4_SP0_CTRL_REG__SP00_MASK 0x7f macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h24352 #define CGTS_CU4_SP0_CTRL_REG__SP00_MASK … macro
H A Dgc_9_1_sh_mask.h25643 #define CGTS_CU4_SP0_CTRL_REG__SP00_MASK … macro
H A Dgc_9_2_1_sh_mask.h25774 #define CGTS_CU4_SP0_CTRL_REG__SP00_MASK … macro