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Searched refs:CG_CLKPIN_CNTL (Results 1 – 9 of 9) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_si.c1246 tmp = RREG32(CG_CLKPIN_CNTL); in si_get_xclk()
2032 orig = data = RREG32(CG_CLKPIN_CNTL); in si_program_aspm()
2035 WREG32(CG_CLKPIN_CNTL, data); in si_program_aspm()
H A Damdgpu_vi.c347 if (REG_GET_FIELD(tmp, CG_CLKPIN_CNTL, XTALIN_DIVIDE)) in vi_get_xclk()
H A Dsid.h163 #define CG_CLKPIN_CNTL 0x198 macro
/netbsd/sys/external/bsd/drm2/dist/drm/radeon/
H A Drv770d.h215 #define CG_CLKPIN_CNTL 0x660 macro
H A Dsid.h161 #define CG_CLKPIN_CNTL 0x660 macro
H A Dcikd.h282 #define CG_CLKPIN_CNTL 0xC05001A0 macro
H A Dradeon_rv770.c802 u32 tmp = RREG32(CG_CLKPIN_CNTL); in rv770_get_xclk()
H A Dradeon_si.c1359 tmp = RREG32(CG_CLKPIN_CNTL); in si_get_xclk()
7450 orig = data = RREG32(CG_CLKPIN_CNTL); in si_program_aspm()
7453 WREG32(CG_CLKPIN_CNTL, data); in si_program_aspm()
H A Dradeon_cik.c1729 if (RREG32_SMC(CG_CLKPIN_CNTL) & XTALIN_DIVIDE) in cik_get_xclk()
9863 orig = data = RREG32_SMC(CG_CLKPIN_CNTL); in cik_program_aspm()
9866 WREG32_SMC(CG_CLKPIN_CNTL, data); in cik_program_aspm()