Home
last modified time | relevance | path

Searched refs:CP_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT (Results 1 – 8 of 8) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2361 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT 0x00000017 macro
H A Dgfx_7_2_sh_mask.h1160 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT 0x17 macro
H A Dgfx_8_1_sh_mask.h2006 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT 0x17 macro
H A Dgfx_8_0_sh_mask.h1482 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT 0x17 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10761 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT … macro
H A Dgc_9_1_sh_mask.h12242 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h12046 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h17674 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE__SHIFT … macro