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Searched refs:CP_STAT__ROQ_INDIRECT1_BUSY_MASK (Results 1 – 8 of 8) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h3092 #define CP_STAT__ROQ_INDIRECT1_BUSY_MASK 0x00000400L macro
H A Dgfx_7_2_sh_mask.h2973 #define CP_STAT__ROQ_INDIRECT1_BUSY_MASK 0x400 macro
H A Dgfx_8_1_sh_mask.h4109 #define CP_STAT__ROQ_INDIRECT1_BUSY_MASK 0x400 macro
H A Dgfx_8_0_sh_mask.h3587 #define CP_STAT__ROQ_INDIRECT1_BUSY_MASK 0x400 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1095 #define CP_STAT__ROQ_INDIRECT1_BUSY_MASK … macro
H A Dgc_9_1_sh_mask.h994 #define CP_STAT__ROQ_INDIRECT1_BUSY_MASK … macro
H A Dgc_9_2_1_sh_mask.h961 #define CP_STAT__ROQ_INDIRECT1_BUSY_MASK … macro
H A Dgc_10_1_0_sh_mask.h6578 #define CP_STAT__ROQ_INDIRECT1_BUSY_MASK … macro