Searched refs:DCLK (Results 1 – 12 of 12) sorted by relevance
146 uint32_t DCLK; member
64 intel_uncore_read(llc_to_gt(llc)->uncore, DCLK) & 0xf; in get_ia_constants()
220 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x0001b010 /* DCLK */
766 ps->uvd_clocks.DCLK = le32_to_cpu(pnon_clock_info->ulDCLK); in init_non_clock_fields()769 ps->uvd_clocks.DCLK = 0; in init_non_clock_fields()
799 smu10_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK; in smu10_dpm_get_pp_table_entry()
3170 power_state->uvd_clocks.DCLK = 0; in smu7_get_pp_table_entry_callback_func_v1()3263 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in smu7_get_pp_table_entry_v1()3411 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in smu7_get_pp_table_entry_v0()
1394 smu8_ps->uvd_clocks.dclk = ps->uvd_clocks.DCLK; in smu8_dpm_get_pp_table_entry()
3080 power_state->uvd_clocks.DCLK = 0; in vega10_get_pp_table_entry_callback_func()3158 ps->uvd_clks.dclk = state->uvd_clocks.DCLK; in vega10_get_pp_table_entry()
144 CLK_MAP(DCLK, PPCLK_DCLK),
160 CLK_MAP(DCLK, PPCLK_DCLK),
3704 #define DCLK _MMIO(MCHBAR_MIRROR_BASE_SNB + 0x5e04) macro