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Searched refs:DISP1_GAP_MASK (Results 1 – 8 of 8) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/radeon/
H A Drv6xxd.h134 # define DISP1_GAP_MASK (3 << 0) macro
H A Drv770d.h259 # define DISP1_GAP_MASK (3 << 0) macro
H A Dradeon_cypress_dpm.c1738 tmp &= ~(DISP1_GAP_MASK | DISP2_GAP_MASK); in cypress_enable_display_gap()
1753 tmp = RREG32(CG_DISPLAY_GAP_CNTL) & ~(DISP1_GAP_MASK | DISP2_GAP_MASK); in cypress_program_display_gap()
H A Dsid.h305 # define DISP1_GAP_MASK (3 << 0) macro
H A Devergreend.h197 # define DISP1_GAP_MASK (3 << 0) macro
H A Dradeon_si_dpm.c3690 tmp = RREG32(CG_DISPLAY_GAP_CNTL) & ~(DISP1_GAP_MASK | DISP2_GAP_MASK); in si_program_display_gap()
3806 tmp &= ~(DISP1_GAP_MASK | DISP2_GAP_MASK); in si_enable_display_gap()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsid.h307 # define DISP1_GAP_MASK (3 << 0) macro
H A Damdgpu_si_dpm.c4157 tmp = RREG32(CG_DISPLAY_GAP_CNTL) & ~(DISP1_GAP_MASK | DISP2_GAP_MASK); in si_program_display_gap()
4273 tmp &= ~(DISP1_GAP_MASK | DISP2_GAP_MASK); in si_enable_display_gap()