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Searched refs:DMA_SEM_WAIT_FAIL_TIMER_CNTL (Results 1 – 6 of 6) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_ni_dma.c212 WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL + reg_offset, 0); in cayman_dma_resume()
H A Dradeon_r600_dma.c133 WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL, 0); in r600_dma_resume()
H A Dnid.h1335 #define DMA_SEM_WAIT_FAIL_TIMER_CNTL 0xd048 macro
H A Dr600d.h643 #define DMA_SEM_WAIT_FAIL_TIMER_CNTL 0xd048 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_si_dma.c147 WREG32(DMA_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0); in si_dma_start()
H A Dsid.h2462 #define DMA_SEM_WAIT_FAIL_TIMER_CNTL 0x3412 macro