1 /* $NetBSD: etphy.c,v 1.9 2020/03/15 23:04:50 thorpej Exp $ */
2 /* $OpenBSD: etphy.c,v 1.4 2008/04/02 20:12:58 brad Exp $ */
3
4 /*
5 * Copyright (c) 2007 The DragonFly Project. All rights reserved.
6 *
7 * This code is derived from software contributed to The DragonFly Project
8 * by Sepherosa Ziehau <sepherosa@gmail.com>
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 *
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in
18 * the documentation and/or other materials provided with the
19 * distribution.
20 * 3. Neither the name of The DragonFly Project nor the names of its
21 * contributors may be used to endorse or promote products derived
22 * from this software without specific, prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
27 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
28 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
29 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
30 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
31 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
32 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
34 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * $DragonFly: src/sys/dev/netif/mii_layer/truephy.c,v 1.1 2007/10/12 14:12:42 sephe Exp $
38 */
39
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: etphy.c,v 1.9 2020/03/15 23:04:50 thorpej Exp $");
42
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/kernel.h>
46 #include <sys/device.h>
47 #include <sys/socket.h>
48
49 #include <net/if.h>
50 #include <net/if_media.h>
51
52 #include <dev/mii/mii.h>
53 #include <dev/mii/miivar.h>
54 #include <dev/mii/miidevs.h>
55
56 #define ETPHY_INDEX 0x10 /* XXX reserved in DS */
57 #define ETPHY_INDEX_MAGIC 0x402
58 #define ETPHY_DATA 0x11 /* XXX reserved in DS */
59
60 #define ETPHY_CTRL 0x12
61 #define ETPHY_CTRL_DIAG 0x0004
62 #define ETPHY_CTRL_RSV1 0x0002 /* XXX reserved */
63 #define ETPHY_CTRL_RSV0 0x0001 /* XXX reserved */
64
65 #define ETPHY_CONF 0x16
66 #define ETPHY_CONF_TXFIFO_MASK 0x3000
67 #define ETPHY_CONF_TXFIFO_8 0x0000
68 #define ETPHY_CONF_TXFIFO_16 0x1000
69 #define ETPHY_CONF_TXFIFO_24 0x2000
70 #define ETPHY_CONF_TXFIFO_32 0x3000
71
72 #define ETPHY_SR 0x1a
73 #define ETPHY_SR_SPD_MASK 0x0300
74 #define ETPHY_SR_SPD_1000T 0x0200
75 #define ETPHY_SR_SPD_100TX 0x0100
76 #define ETPHY_SR_SPD_10T 0x0000
77 #define ETPHY_SR_FDX 0x0080
78
79
80 static int etphy_service(struct mii_softc *, struct mii_data *, int);
81 static void etphy_attach(device_t, device_t, void *);
82 static int etphy_match(device_t, cfdata_t, void *);
83 static void etphy_reset(struct mii_softc *);
84 static void etphy_status(struct mii_softc *);
85
86 static const struct mii_phy_funcs etphy_funcs = {
87 etphy_service, etphy_status, etphy_reset,
88 };
89
90 static const struct mii_phydesc etphys[] = {
91 MII_PHY_DESC(AGERE, ET1011),
92 MII_PHY_DESC(AGERE, ET1011C),
93 MII_PHY_END,
94 };
95
96 CFATTACH_DECL_NEW(etphy, sizeof(struct mii_softc),
97 etphy_match, etphy_attach, mii_phy_detach, mii_phy_activate);
98
99 static const struct etphy_dsp {
100 uint16_t index;
101 uint16_t data;
102 } etphy_dspcode[] = {
103 { 0x880b, 0x0926 }, /* AfeIfCreg4B1000Msbs */
104 { 0x880c, 0x0926 }, /* AfeIfCreg4B100Msbs */
105 { 0x880d, 0x0926 }, /* AfeIfCreg4B10Msbs */
106
107 { 0x880e, 0xb4d3 }, /* AfeIfCreg4B1000Lsbs */
108 { 0x880f, 0xb4d3 }, /* AfeIfCreg4B100Lsbs */
109 { 0x8810, 0xb4d3 }, /* AfeIfCreg4B10Lsbs */
110
111 { 0x8805, 0xb03e }, /* AfeIfCreg3B1000Msbs */
112 { 0x8806, 0xb03e }, /* AfeIfCreg3B100Msbs */
113 { 0x8807, 0xff00 }, /* AfeIfCreg3B10Msbs */
114
115 { 0x8808, 0xe090 }, /* AfeIfCreg3B1000Lsbs */
116 { 0x8809, 0xe110 }, /* AfeIfCreg3B100Lsbs */
117 { 0x880a, 0x0000 }, /* AfeIfCreg3B10Lsbs */
118
119 { 0x300d, 1 }, /* DisableNorm */
120
121 { 0x280c, 0x0180 }, /* LinkHoldEnd */
122
123 { 0x1c21, 0x0002 }, /* AlphaM */
124
125 { 0x3821, 6 }, /* FfeLkgTx0 */
126 { 0x381d, 1 }, /* FfeLkg1g4 */
127 { 0x381e, 1 }, /* FfeLkg1g5 */
128 { 0x381f, 1 }, /* FfeLkg1g6 */
129 { 0x3820, 1 }, /* FfeLkg1g7 */
130
131 { 0x8402, 0x01f0 }, /* Btinact */
132 { 0x800e, 20 }, /* LftrainTime */
133 { 0x800f, 24 }, /* DvguardTime */
134 { 0x8010, 46 } /* IdlguardTime */
135 };
136
137 static int
etphy_match(device_t parent,cfdata_t match,void * aux)138 etphy_match(device_t parent, cfdata_t match, void *aux)
139 {
140 struct mii_attach_args *ma = aux;
141
142 if (mii_phy_match(ma, etphys) != NULL)
143 return 10;
144
145 return 0;
146 }
147
148 static void
etphy_attach(device_t parent,device_t self,void * aux)149 etphy_attach(device_t parent, device_t self, void *aux)
150 {
151 struct mii_softc *sc = device_private(self);
152 struct mii_attach_args *ma = aux;
153 struct mii_data *mii = ma->mii_data;
154 const struct mii_phydesc *mpd;
155
156 mpd = mii_phy_match(ma, etphys);
157 aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
158
159 sc->mii_dev = self;
160 sc->mii_inst = mii->mii_instance;
161 sc->mii_phy = ma->mii_phyno;
162 sc->mii_funcs = &etphy_funcs;
163 sc->mii_mpd_model = MII_MODEL(ma->mii_id2);
164 sc->mii_pdata = mii;
165 sc->mii_flags = ma->mii_flags;
166
167 sc->mii_flags |= MIIF_NOISOLATE | MIIF_NOLOOP;
168
169 mii_lock(mii);
170
171 PHY_RESET(sc);
172
173 PHY_READ(sc, MII_BMSR, &sc->mii_capabilities);
174 sc->mii_capabilities &= ma->mii_capmask;
175 if (sc->mii_capabilities & BMSR_EXTSTAT) {
176 PHY_READ(sc, MII_EXTSR, &sc->mii_extcapabilities);
177 /* No 1000baseT half-duplex support */
178 sc->mii_extcapabilities &= ~EXTSR_1000THDX;
179 }
180
181 mii_unlock(mii);
182
183 mii_phy_add_media(sc);
184 }
185
186 static int
etphy_service(struct mii_softc * sc,struct mii_data * mii,int cmd)187 etphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
188 {
189 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
190 uint16_t bmcr;
191
192 KASSERT(mii_locked(mii));
193
194 switch (cmd) {
195 case MII_POLLSTAT:
196 /* If we're not polling our PHY instance, just return. */
197 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
198 return 0;
199 break;
200
201 case MII_MEDIACHG:
202 /*
203 * If the media indicates a different PHY instance,
204 * isolate ourselves.
205 */
206 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
207 PHY_READ(sc, MII_BMCR, &bmcr);
208 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
209 return 0;
210 }
211
212 /* If the interface is not up, don't do anything. */
213 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
214 break;
215
216 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
217 PHY_READ(sc, MII_BMCR, &bmcr);
218 bmcr &= ~BMCR_AUTOEN;
219 PHY_WRITE(sc, MII_BMCR, bmcr);
220 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_PDOWN);
221 } else {
222 /*
223 * Issue reset before configuring autonego.
224 * XXX Is this required?
225 */
226 PHY_RESET(sc);
227 }
228
229 mii_phy_setmedia(sc);
230
231 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
232 PHY_READ(sc, MII_BMCR, &bmcr);
233 bmcr &= ~BMCR_PDOWN;
234 PHY_WRITE(sc, MII_BMCR, bmcr);
235
236 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
237 PHY_WRITE(sc, MII_BMCR,
238 bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
239 }
240 }
241 break;
242
243 case MII_TICK:
244 /* If we're not currently selected, just return. */
245 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
246 return 0;
247
248 if (mii_phy_tick(sc) == EJUSTRETURN)
249 return 0;
250 break;
251 }
252
253 /* Update the media status. */
254 mii_phy_status(sc);
255
256 /* Callback if something changed. */
257 mii_phy_update(sc, cmd);
258 return 0;
259 }
260
261 static void
etphy_reset(struct mii_softc * sc)262 etphy_reset(struct mii_softc *sc)
263 {
264 uint16_t reg;
265 int i;
266
267 KASSERT(mii_locked(sc->mii_pdata));
268
269 if (sc->mii_mpd_model == MII_MODEL_AGERE_ET1011) {
270 mii_phy_reset(sc);
271 return;
272 }
273
274 for (i = 0; i < 2; ++i) {
275 PHY_READ(sc, MII_PHYIDR1, ®);
276 PHY_READ(sc, MII_PHYIDR2, ®);
277
278 PHY_READ(sc, ETPHY_CTRL, ®);
279 PHY_WRITE(sc, ETPHY_CTRL, ETPHY_CTRL_DIAG | ETPHY_CTRL_RSV1);
280
281 PHY_WRITE(sc, ETPHY_INDEX, ETPHY_INDEX_MAGIC);
282 PHY_READ(sc, ETPHY_DATA, ®);
283
284 PHY_WRITE(sc, ETPHY_CTRL, ETPHY_CTRL_RSV1);
285 }
286
287 PHY_READ(sc, MII_BMCR, ®);
288 PHY_READ(sc, ETPHY_CTRL, ®);
289 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000);
290 PHY_WRITE(sc, ETPHY_CTRL,
291 ETPHY_CTRL_DIAG | ETPHY_CTRL_RSV1 | ETPHY_CTRL_RSV0);
292
293 #define N(arr) (int)(sizeof(arr) / sizeof(arr[0]))
294
295 for (i = 0; i < N(etphy_dspcode); ++i) {
296 const struct etphy_dsp *dsp = &etphy_dspcode[i];
297
298 PHY_WRITE(sc, ETPHY_INDEX, dsp->index);
299 PHY_WRITE(sc, ETPHY_DATA, dsp->data);
300
301 PHY_WRITE(sc, ETPHY_INDEX, dsp->index);
302 PHY_READ(sc, ETPHY_DATA, ®);
303 }
304
305 #undef N
306
307 PHY_READ(sc, MII_BMCR, ®);
308 PHY_READ(sc, ETPHY_CTRL, ®);
309 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_S1000);
310 PHY_WRITE(sc, ETPHY_CTRL, ETPHY_CTRL_RSV1);
311
312 mii_phy_reset(sc);
313 }
314
315 static void
etphy_status(struct mii_softc * sc)316 etphy_status(struct mii_softc *sc)
317 {
318 struct mii_data *mii = sc->mii_pdata;
319 uint16_t bmsr, bmcr, sr;
320
321 KASSERT(mii_locked(mii));
322
323 mii->mii_media_status = IFM_AVALID;
324 mii->mii_media_active = IFM_ETHER;
325
326 PHY_READ(sc, ETPHY_SR, &sr);
327 PHY_READ(sc, MII_BMCR, &bmcr);
328
329 PHY_READ(sc, MII_BMSR, &bmsr);
330 PHY_READ(sc, MII_BMSR, &bmsr);
331 if (bmsr & BMSR_LINK)
332 mii->mii_media_status |= IFM_ACTIVE;
333
334 if (bmcr & BMCR_AUTOEN) {
335 if ((bmsr & BMSR_ACOMP) == 0) {
336 mii->mii_media_active |= IFM_NONE;
337 return;
338 }
339 }
340
341 switch (sr & ETPHY_SR_SPD_MASK) {
342 case ETPHY_SR_SPD_1000T:
343 mii->mii_media_active |= IFM_1000_T;
344 break;
345 case ETPHY_SR_SPD_100TX:
346 mii->mii_media_active |= IFM_100_TX;
347 break;
348 case ETPHY_SR_SPD_10T:
349 mii->mii_media_active |= IFM_10_T;
350 break;
351 default:
352 mii->mii_media_active |= IFM_NONE;
353 return;
354 }
355
356 if (sr & ETPHY_SR_FDX)
357 mii->mii_media_active |= IFM_FDX | mii_phy_flowstatus(sc);
358 else
359 mii->mii_media_active |= IFM_HDX;
360 }
361