| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoC.td | 834 def : CompressPat<(SUB GPRC:$rs1, GPRC:$rs1, GPRC:$rs2),
836 def : CompressPat<(XOR GPRC:$rs1, GPRC:$rs1, GPRC:$rs2),
839 def : CompressPat<(XOR GPRC:$rs1, GPRC:$rs2, GPRC:$rs1),
841 def : CompressPat<(OR GPRC:$rs1, GPRC:$rs1, GPRC:$rs2),
842 (C_OR GPRC:$rs1, GPRC:$rs2)>;
844 def : CompressPat<(OR GPRC:$rs1, GPRC:$rs2, GPRC:$rs1),
846 def : CompressPat<(AND GPRC:$rs1, GPRC:$rs1, GPRC:$rs2),
849 def : CompressPat<(AND GPRC:$rs1, GPRC:$rs2, GPRC:$rs1),
857 def : CompressPat<(SUBW GPRC:$rs1, GPRC:$rs1, GPRC:$rs2),
859 def : CompressPat<(ADDW GPRC:$rs1, GPRC:$rs1, GPRC:$rs2),
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| H A D | RISCVInstrInfoB.td | 521 : RVInst16<(outs GPRC:$rs_wb), (ins GPRC:$rs), opcodestr, "$rs", [],
701 def : CompressPat<(XORI GPRC:$rs1, GPRC:$rs1, -1),
702 (C_NOT GPRC:$rs1)>;
703 def : CompressPat<(SUB GPRC:$rs1, X0, GPRC:$rs1),
704 (C_NEG GPRC:$rs1)>;
708 def : CompressPat<(ADDUW GPRC:$rs1, GPRC:$rs1, X0),
709 (C_ZEXTW GPRC:$rs1)>;
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| H A D | RISCVRegisterInfo.td | 73 // are not part of GPRC, the most restrictive register class used by the
165 def GPRC : RegisterClass<"RISCV", [XLenVT], 32, (add
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.cpp | 579 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in lowerDynamicAlloc() local
645 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in prepareDynamicAlloca() local
686 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca()
694 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca()
788 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in lowerCRSpilling() local
802 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
833 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in lowerCRRestore() local
877 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in lowerCRBitSpilling() local
995 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in lowerCRBitRestore() local
1322 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in eliminateFrameIndex() local
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| H A D | PPCRegisterInfo.td | 285 def GPRC : RegisterClass<"PPC", [i32,f32], 32, (add (sequence "R%u", 2, 12),
290 let AltOrders = [(add (sub GPRC, R2), R2)];
310 def GPRC_NOR0 : RegisterClass<"PPC", [i32,f32], 32, (add (sub GPRC, R0), ZERO)> {
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| H A D | PPCISelLowering.cpp | 11214 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in EmitPartwordAtomicBinary() local
11220 Register Incr2Reg = RegInfo.createVirtualRegister(GPRC); in EmitPartwordAtomicBinary()
11221 Register MaskReg = RegInfo.createVirtualRegister(GPRC); in EmitPartwordAtomicBinary()
11224 Register Tmp2Reg = RegInfo.createVirtualRegister(GPRC); in EmitPartwordAtomicBinary()
11225 Register Tmp3Reg = RegInfo.createVirtualRegister(GPRC); in EmitPartwordAtomicBinary()
11226 Register Tmp4Reg = RegInfo.createVirtualRegister(GPRC); in EmitPartwordAtomicBinary()
11316 Register SReg = RegInfo.createVirtualRegister(GPRC); in EmitPartwordAtomicBinary()
11323 ValueReg = RegInfo.createVirtualRegister(GPRC); in EmitPartwordAtomicBinary()
11688 const TargetRegisterClass *GPRC = &PPC::GPRCRegClass; in emitProbedAlloca() local
11787 MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca()
[all …]
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| H A D | PPCFrameLowering.cpp | 2274 const TargetRegisterClass &GPRC = PPC::GPRCRegClass; in addScavengingSpillSlot() local
2276 const TargetRegisterClass &RC = Subtarget.isPPC64() ? G8RC : GPRC; in addScavengingSpillSlot()
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| H A D | PPCInstrVSX.td | 2661 (COPY_TO_REGCLASS (XVTDIVDP $A, $B), GPRC)>;
2663 (COPY_TO_REGCLASS (XVTDIVSP $A, $B), GPRC)>;
2665 (COPY_TO_REGCLASS (XVTSQRTDP $A), GPRC)>;
2667 (COPY_TO_REGCLASS (XVTSQRTSP $A), GPRC)>;
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| H A D | PPCInstrInfo.td | 629 def gprc : RegisterOperand<GPRC> {
695 def spe4rc : RegisterOperand<GPRC> {
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| /netbsd/external/apache2/llvm/dist/llvm/docs/ |
| H A D | CodeGenerator.rst | 1090 def STWU : DForm_1<37, (outs ptr_rc:$ea_res), (ins GPRC:$rS, memri:$dst),
1094 def : Pat<(pre_store GPRC:$rS, ptr_rc:$ptrreg, iaddroff:$ptroff),
1095 (STWU GPRC:$rS, iaddroff:$ptroff, ptr_rc:$ptrreg)>;
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