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Searched refs:GRBM_SE0_PERFCOUNTER_SELECT__PERF_SEL__SHIFT (Results 1 – 8 of 8) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h4839 #define GRBM_SE0_PERFCOUNTER_SELECT__PERF_SEL__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h5130 #define GRBM_SE0_PERFCOUNTER_SELECT__PERF_SEL__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h6450 #define GRBM_SE0_PERFCOUNTER_SELECT__PERF_SEL__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h5916 #define GRBM_SE0_PERFCOUNTER_SELECT__PERF_SEL__SHIFT 0x0 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21261 #define GRBM_SE0_PERFCOUNTER_SELECT__PERF_SEL__SHIFT … macro
H A Dgc_9_1_sh_mask.h22572 #define GRBM_SE0_PERFCOUNTER_SELECT__PERF_SEL__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h22511 #define GRBM_SE0_PERFCOUNTER_SELECT__PERF_SEL__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h30967 #define GRBM_SE0_PERFCOUNTER_SELECT__PERF_SEL__SHIFT … macro