| /netbsd/sys/external/bsd/drm2/dist/drm/i915/display/ |
| H A D | intel_pipe_crc.c | 422 else if (IS_GEN_RANGE(dev_priv, 5, 6)) in get_new_crc_ctl_reg()
567 else if (IS_GEN_RANGE(dev_priv, 5, 6)) in intel_is_valid_crc_source()
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| H A D | intel_fifo_underrun.c | 271 else if (IS_GEN_RANGE(dev_priv, 5, 6)) in __intel_set_cpu_fifo_underrun_reporting()
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| H A D | intel_crt.c | 347 else if (IS_GEN_RANGE(dev_priv, 3, 4)) in intel_crt_mode_valid()
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| H A D | intel_color.c | 221 IS_GEN_RANGE(dev_priv, 9, 10)); in ilk_csc_limited_range()
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| H A D | intel_bios.c | 576 if (!IS_GEN_RANGE(dev_priv, 3, 7)) { in parse_sdvo_device_mapping()
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| H A D | intel_display.c | 12247 (IS_GEN_RANGE(dev_priv, 5, 6) || in intel_plane_atomic_calc_changes()
16822 } else if (IS_GEN_RANGE(dev_priv, 3, 4)) { in intel_setup_outputs()
18308 if (IS_GEN_RANGE(dev_priv, 10, 12) || IS_GEMINILAKE(dev_priv)) in intel_early_display_was()
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| /netbsd/sys/external/bsd/drm2/dist/drm/i915/gt/ |
| H A D | intel_ring_submission.c | 586 if (!IS_GEN_RANGE(dev_priv, 6, 7)) in flush_cs_tlb()
880 if (IS_GEN_RANGE(i915, 4, 6)) in rcs_resume()
890 if (IS_GEN_RANGE(i915, 6, 7)) in rcs_resume()
916 if (IS_GEN_RANGE(i915, 6, 7)) in rcs_resume()
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| H A D | intel_gtt.c | 556 if (IS_GEN_RANGE(i915, 8, 11)) { in gtt_write_workarounds()
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| H A D | gen8_ppgtt.c | 778 ppgtt->vm.has_read_only = !IS_GEN_RANGE(gt->i915, 11, 12); in gen8_ppgtt_create()
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| H A D | intel_workarounds.c | 1422 if (IS_GEN_RANGE(i915, 9, 11)) { in rcs_engine_wa_init()
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| H A D | intel_engine_cs.c | 1292 if (engine->id == RENDER_CLASS && IS_GEN_RANGE(dev_priv, 4, 7)) in intel_engine_print_registers()
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| /netbsd/sys/external/bsd/drm2/dist/drm/i915/ |
| H A D | intel_uncore.c | 1578 } else if (IS_GEN_RANGE(i915, 9, 10)) { in intel_uncore_fw_domains_init()
1795 if (IS_GEN_RANGE(i915, 6, 7)) { in uncore_forcewake_init()
1813 } else if (IS_GEN_RANGE(i915, 9, 10)) { in uncore_forcewake_init()
1865 if (IS_GEN_RANGE(i915, 6, 7)) in intel_uncore_init_mmio()
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| H A D | i915_gpu_error.c | 692 if (IS_GEN_RANGE(m->i915, 6, 11)) { in err_print_gt()
709 if (IS_GEN_RANGE(m->i915, 8, 11)) in err_print_gt()
1609 if (IS_GEN_RANGE(i915, 6, 7)) { in gt_record_regs()
1614 if (IS_GEN_RANGE(i915, 8, 11)) in gt_record_regs()
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| H A D | i915_perf.c | 2547 if (IS_GEN_RANGE(stream->perf->i915, 9, 11)) { in gen8_enable_metric_set()
4536 if (IS_GEN_RANGE(i915, 8, 9)) { in i915_perf_init()
4568 } else if (IS_GEN_RANGE(i915, 10, 11)) { in i915_perf_init()
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| H A D | intel_device_info.c | 964 if (HAS_DISPLAY(dev_priv) && IS_GEN_RANGE(dev_priv, 7, 8) && in intel_device_info_runtime_init()
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| H A D | i915_cmd_parser.c | 1532 GEM_BUG_ON(!IS_GEN_RANGE(engine->i915, 6, 7)); in intel_engine_cmd_parser()
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| H A D | i915_debugfs.c | 1579 if (IS_GEN_RANGE(dev_priv, 3, 4)) { in i915_swizzle_info()
3626 if (!(IS_GEN_RANGE(dev_priv, 6, 7))) in i915_cache_sharing_get()
3643 if (!(IS_GEN_RANGE(dev_priv, 6, 7))) in i915_cache_sharing_set()
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| H A D | i915_drv.h | 1431 #define IS_GEN_RANGE(dev_priv, s, e) \ macro
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