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Searched refs:IS_VALLEYVIEW (Results 1 – 25 of 35) sorted by relevance

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/netbsd/sys/external/bsd/drm2/dist/drm/i915/display/
H A Dintel_dsi_vbt.c382 else if (IS_VALLEYVIEW(dev_priv)) in mipi_exec_gpio()
849 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_vbt_gpio_init()
855 if (IS_VALLEYVIEW(dev_priv) && mipi_config->pwm_blc == PPS_BLC_SOC) { in intel_dsi_vbt_gpio_init()
905 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_vbt_gpio_cleanup()
909 if (IS_VALLEYVIEW(dev_priv) && mipi_config->pwm_blc == PPS_BLC_SOC) { in intel_dsi_vbt_gpio_cleanup()
H A Dintel_pipe_crc.c420 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in get_new_crc_ctl_reg()
565 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_is_valid_crc_source()
638 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_crtc_set_crc_source()
H A Dintel_cdclk.c440 if (IS_VALLEYVIEW(dev_priv) && min_cdclk > freq_320) in vlv_calc_cdclk()
452 if (IS_VALLEYVIEW(dev_priv)) { in vlv_calc_voltage_level()
487 if (IS_VALLEYVIEW(dev_priv)) in vlv_get_cdclk()
1988 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_crtc_compute_min_cdclk()
1997 IS_VALLEYVIEW(dev_priv)) in intel_crtc_compute_min_cdclk()
2503 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_update_max_cdclk()
2535 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_update_cdclk()
2620 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_update_rawclk()
2669 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_init_cdclk_hooks()
2684 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_init_cdclk_hooks()
H A Dintel_dp.c1120 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in edp_notify_handler()
1146 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_power()
1159 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_vdd()
1808 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_dp_set_clock()
3588 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_enable_dp()
3598 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_enable_dp()
4156 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_dp_set_signal_levels()
4291 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dp_link_down()
6570 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_dp_encoder_reset()
7524 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_dp_init_connector()
[all …]
H A Dintel_vga.c21 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_vga_cntrl_reg()
H A Dintel_crt.c341 else if (IS_VALLEYVIEW(dev_priv)) in intel_crt_mode_valid()
545 if (IS_VALLEYVIEW(dev_priv)) in intel_crt_detect_hotplug()
972 else if (IS_VALLEYVIEW(dev_priv)) in intel_crt_init()
H A Dintel_audio.c579 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in ilk_audio_codec_disable()
638 } else if (IS_VALLEYVIEW(dev_priv) || in ilk_audio_codec_enable()
796 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_init_audio_hooks()
H A Dintel_lpe_audio.c187 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in lpe_audio_detect()
H A Dvlv_dsi.c788 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dsi_pre_enable()
994 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_get_hw_state()
1341 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dsi_prepare()
1611 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in vlv_dsi_get_panel_orientation()
H A Dintel_display.c241 if (!(IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))) in intel_update_czclk()
653 if (!IS_PINEVIEW(dev_priv) && !IS_VALLEYVIEW(dev_priv) && in intel_PLL_is_valid()
2153 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_linear_alignment()
7465 else if (IS_VALLEYVIEW(dev_priv)) in i9xx_crtc_disable()
8788 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_set_pipeconf()
9263 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_get_pipe_config()
9336 else if (IS_VALLEYVIEW(dev_priv)) in i9xx_get_pipe_config()
12677 if ((IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in compute_baseline_pipe_bpp()
14408 IS_CHERRYVIEW(dev_priv) || IS_VALLEYVIEW(dev_priv) || in active_planes_affects_min_cdclk()
16483 IS_VALLEYVIEW(dev_priv) || IS_G4X(dev_priv)) in intel_crtc_init()
[all …]
H A Dintel_hdmi.c983 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_hdmi_set_gcp_infoframe()
1008 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_hdmi_read_gcp_infoframe()
3104 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_infoframe_init()
3281 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_hdmi_init()
/netbsd/sys/external/bsd/drm2/dist/drm/i915/gt/
H A Dintel_rps.c85 if (IS_VALLEYVIEW(gt->i915)) in rps_enable_interrupts()
587 if (IS_VALLEYVIEW(i915)) in rps_set_power()
707 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in rps_set()
1191 else if (IS_VALLEYVIEW(i915)) in intel_rps_enable()
1267 else if (IS_VALLEYVIEW(i915)) in intel_gpu_freq()
1282 else if (IS_VALLEYVIEW(i915)) in intel_freq_opcode()
1635 else if (IS_VALLEYVIEW(i915)) in intel_rps_init()
1692 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_rps_get_cagf()
1709 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in read_cagf()
H A Dintel_rc6.c537 else if (IS_VALLEYVIEW(i915)) in intel_rc6_init()
573 else if (IS_VALLEYVIEW(i915)) in intel_rc6_enable()
730 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_rc6_residency_ns()
H A Dselftest_rc6.c37 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) in live_rc6_manual()
H A Ddebugfs_gt_pm.c234 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in drpc_show()
266 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in frequency_show()
/netbsd/sys/external/bsd/drm2/dist/drm/i915/selftests/
H A Dintel_uncore.c160 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) { in live_forcewake_ops()
271 !IS_VALLEYVIEW(gt->i915) && in live_forcewake_domains()
/netbsd/sys/external/bsd/drm2/dist/drm/i915/
H A Di915_drv.c235 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_setup_mchbar()
403 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_init_dpio()
476 if (!IS_VALLEYVIEW(i915)) in vlv_alloc_s0ix_state()
1844 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_drm_suspend_late()
2035 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_drm_resume_early()
2619 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_runtime_suspend()
2672 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in intel_runtime_suspend()
2700 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_runtime_resume()
2719 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in intel_runtime_resume()
H A Di915_sysfs.c580 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in i915_setup_sysfs()
601 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_setup_sysfs()
617 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_teardown_sysfs()
H A Dintel_sideband.c67 if (IS_VALLEYVIEW(i915)) { in __vlv_punit_get()
75 if (IS_VALLEYVIEW(i915)) in __vlv_punit_put()
H A Di915_gem_fence_reg.c588 if (INTEL_GEN(i915) >= 8 || IS_VALLEYVIEW(i915)) { in detect_bit_6_swizzle()
861 !(IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))) in i915_ggtt_init_fences()
H A Dintel_uncore.c389 if (IS_VALLEYVIEW(uncore->i915)) in __gen6_gt_wait_for_fifo()
918 IS_VALLEYVIEW(dev_priv))
1589 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_uncore_fw_domains_init()
1798 if (IS_VALLEYVIEW(i915)) { in uncore_forcewake_init()
1862 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_uncore_init_mmio()
H A Di915_irq.c1460 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_ack()
1497 if (IS_G4X(dev_priv) || IS_VALLEYVIEW(dev_priv) || in i9xx_hpd_irq_handler()
3934 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_irq_init()
3984 else if (IS_VALLEYVIEW(dev_priv)) in intel_irq_handler()
4007 else if (IS_VALLEYVIEW(dev_priv)) in intel_irq_reset()
4030 else if (IS_VALLEYVIEW(dev_priv)) in intel_irq_postinstall()
H A Di915_pmu.c132 IS_VALLEYVIEW(i915) ? in __get_rc6()
496 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in config_status()
H A Di915_debugfs.c544 } else if (IS_VALLEYVIEW(dev_priv)) { in i915_interrupt_info()
809 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in i915_frequency_info()
1215 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_drpc_info()
1363 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i915_sr_status()
3234 else if (IS_VALLEYVIEW(dev_priv)) in wm_latency_show()
3251 IS_VALLEYVIEW(dev_priv) || in wm_latency_show()
3354 else if (IS_VALLEYVIEW(dev_priv)) in wm_latency_write()
/netbsd/sys/external/bsd/drm2/dist/drm/i915/gem/
H A Di915_gem_stolen.c437 if (IS_VALLEYVIEW(i915)) in i915_gem_init_stolen()

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