| /netbsd/external/apache2/llvm/dist/clang/include/clang/Basic/ |
| H A D | AArch64SVEACLETypes.def | 15 // SVE_VECTOR_TYPE(Name, Id, SingletonId, ElKind, ElBits, IsSigned, IsFP) -
36 // - IsFP is true for vectors of floating-point elements.
43 IsSigned, IsFP, IsBF) \
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| H A D | RISCVVTypes.def | 15 // - RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, IsSigned, IsFP)
39 // - IsFP is true for vectors of floating-point elements.
44 #define RVV_VECTOR_TYPE(Name, Id, SingletonId, NumEls, ElBits, NF, IsSigned, IsFP)\
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 5733 bool IsFP = ValueSVT.isFloatingPoint(); in Select() local
5744 Opc = IsFP ? X86::VGATHERDPSZrm : X86::VPGATHERDDZrm; in Select()
5750 Opc = IsFP ? X86::VGATHERDPDZrm : X86::VPGATHERDQZrm; in Select()
5756 Opc = IsFP ? X86::VGATHERQPSZrm : X86::VPGATHERQDZrm; in Select()
5762 Opc = IsFP ? X86::VGATHERQPDZrm : X86::VPGATHERQQZrm; in Select()
5767 Opc = IsFP ? X86::VGATHERDPSrm : X86::VPGATHERDDrm; in Select()
5769 Opc = IsFP ? X86::VGATHERDPSYrm : X86::VPGATHERDDYrm; in Select()
5771 Opc = IsFP ? X86::VGATHERDPDrm : X86::VPGATHERDQrm; in Select()
5775 Opc = IsFP ? X86::VGATHERQPSrm : X86::VPGATHERQDrm; in Select()
5779 Opc = IsFP ? X86::VGATHERQPDrm : X86::VPGATHERQQrm; in Select()
[all …]
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| H A D | X86ISelLowering.cpp | 21780 bool IsFP = Op.getSimpleValueType().isFloatingPoint(); in lowerAddSubToHorizontalOp() local
21781 if (IsFP && !Subtarget.hasSSE3()) in lowerAddSubToHorizontalOp()
21783 if (!IsFP && !Subtarget.hasSSSE3()) in lowerAddSubToHorizontalOp()
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| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | Utils.h | 377 bool IsFP);
381 int64_t getICmpTrueVal(const TargetLowering &TLI, bool IsVector, bool IsFP);
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| H A D | MachineIRBuilder.h | 652 unsigned getBoolExtOp(bool IsVec, bool IsFP) const;
657 bool IsFP);
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 970 bool IsFP) { in isConstTrueVal() argument
971 switch (TLI.getBooleanContents(IsVector, IsFP)) { in isConstTrueVal()
983 bool IsFP) { in getICmpTrueVal() argument
984 switch (TLI.getBooleanContents(IsVector, IsFP)) { in getICmpTrueVal()
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| H A D | MachineIRBuilder.cpp | 431 unsigned MachineIRBuilder::getBoolExtOp(bool IsVec, bool IsFP) const { in getBoolExtOp()
433 switch (TLI->getBooleanContents(IsVec, IsFP)) { in getBoolExtOp()
445 bool IsFP) { in buildBoolExt() argument
446 unsigned ExtOp = getBoolExtOp(getMRI()->getType(Op.getReg()).isVector(), IsFP); in buildBoolExt()
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| H A D | CombinerHelper.cpp | 3110 int64_t Cst, bool IsVector, bool IsFP) { in isConstValidTrue() argument
3113 isConstTrueVal(TLI, Cst, IsVector, IsFP); in isConstValidTrue()
3137 bool IsFP = false; in matchNotCmp() local
3149 if (IsFP) in matchNotCmp()
3157 IsFP = true; in matchNotCmp()
3181 if (!isConstValidTrue(TLI, Ty.getScalarSizeInBits(), *MaybeCst, true, IsFP)) in matchNotCmp()
3186 if (!isConstValidTrue(TLI, Ty.getSizeInBits(), Cst, false, IsFP)) in matchNotCmp()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.h | 112 bool IsFP) const;
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| H A D | MipsSEISelLowering.cpp | 3327 bool IsFP) const { in emitINSERT_DF_VIDX()
3374 if (IsFP) { in emitINSERT_DF_VIDX()
3400 if (IsFP) { in emitINSERT_DF_VIDX()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 57 bool IsFP) { in getVGPRSpillLaneOrTempRegister() argument
78 dbgs() << "Spilling " << (IsFP ? "FP" : "BP") << " to " in getVGPRSpillLaneOrTempRegister()
99 dbgs() << (IsFP ? "FP" : "BP") << " requires fallback spill to " in getVGPRSpillLaneOrTempRegister()
107 << (IsFP ? "FP" : "BP") << '\n'); in getVGPRSpillLaneOrTempRegister()
110 LLVM_DEBUG(dbgs() << "Saving " << (IsFP ? "FP" : "BP") << " with copy to " in getVGPRSpillLaneOrTempRegister()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 1070 bool IsFP = Ty->isFPOrFPVectorTy(); in getDecodedUnaryOpcode() local
1072 if (!IsFP && !Ty->isIntOrIntVectorTy()) in getDecodedUnaryOpcode()
1079 return IsFP ? Instruction::FNeg : -1; in getDecodedUnaryOpcode()
1084 bool IsFP = Ty->isFPOrFPVectorTy(); in getDecodedBinaryOpcode() local
1086 if (!IsFP && !Ty->isIntOrIntVectorTy()) in getDecodedBinaryOpcode()
1099 return IsFP ? -1 : Instruction::UDiv; in getDecodedBinaryOpcode()
1103 return IsFP ? -1 : Instruction::URem; in getDecodedBinaryOpcode()
1107 return IsFP ? -1 : Instruction::Shl; in getDecodedBinaryOpcode()
1113 return IsFP ? -1 : Instruction::And; in getDecodedBinaryOpcode()
1115 return IsFP ? -1 : Instruction::Or; in getDecodedBinaryOpcode()
[all …]
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| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1325 NodeType getExtForLoadExtType(bool IsFP, LoadExtType);
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| /netbsd/external/apache2/llvm/dist/llvm/include/llvm/AsmParser/ |
| H A D | LLParser.h | 581 bool IsFP);
583 unsigned Opc, bool IsFP);
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1512 bool IsFP, SDValue &LHS, SDValue &RHS, in TranslateM68kCC() argument
1514 if (!IsFP) { in TranslateM68kCC()
1956 bool IsFP = Op1.getSimpleValueType().isFloatingPoint(); in LowerSETCC() local
1957 unsigned M68kCC = TranslateM68kCC(CC, DL, IsFP, Op0, Op1, DAG); in LowerSETCC()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/AsmParser/ |
| H A D | LLParser.cpp | 6832 unsigned Opc, bool IsFP) { in parseUnaryOp() argument
6837 bool Valid = IsFP ? LHS->getType()->isFPOrFPVectorTy() in parseUnaryOp()
6972 unsigned Opc, bool IsFP) { in parseArithmetic() argument
6979 bool Valid = IsFP ? LHS->getType()->isFPOrFPVectorTy() in parseArithmetic()
7626 bool IsFP = false; in parseAtomicRMW() local
7649 IsFP = true; in parseAtomicRMW()
7653 IsFP = true; in parseAtomicRMW()
7680 } else if (IsFP) { in parseAtomicRMW()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| H A D | LowerMatrixIntrinsics.cpp | 1035 bool IsFP = Result.getElementType()->isFloatingPointTy(); in emitMatrixMultiply() local
1090 IsFP, Builder, AllowContraction, NumComputeOps); in emitMatrixMultiply()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 1322 bool IsFP = fieldFromInstruction(insn, 26, 1); in DecodeSignedLdStInstruction() local
1325 if (IsLoad && IsIndexed && !IsFP && Rn != 31 && Rt == Rn) in DecodeSignedLdStInstruction()
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| /netbsd/external/apache2/llvm/dist/clang/lib/AST/ |
| H A D | ASTContext.cpp | 2177 IsSigned, IsFP, IsBF) \ in getTypeInfoImpl() argument
2195 IsFP) \ in getTypeInfoImpl() argument
3874 IsSigned, IsFP, IsBF) \ in getScalableVectorType() argument
3879 IsFP && !IsBF) || \ in getScalableVectorType()
3881 IsBF && !IsFP)) && \ in getScalableVectorType()
3892 IsFP) \ in getScalableVectorType() argument
3896 (EltTy->hasFloatingRepresentation() && IsFP)) && \ in getScalableVectorType()
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| H A D | ItaniumMangle.cpp | 3036 ElBits, IsSigned, IsFP, IsBF) \ in mangleType() argument
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| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 2844 bool IsFP = CmpOp0.getValueType().isFloatingPoint(); in lowerVectorSETCC() local
2845 assert (!Chain || IsFP); in lowerVectorSETCC()
2848 Chain ? CmpMode::StrictFP : IsFP ? CmpMode::FP : CmpMode::Int; in lowerVectorSETCC()
2857 assert(IsFP && "Unexpected integer comparison"); in lowerVectorSETCC()
2874 assert(IsFP && "Unexpected integer comparison"); in lowerVectorSETCC()
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| /netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 438 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) { in getExtForLoadExtType() argument
441 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND; in getExtForLoadExtType()
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