/netbsd/sys/external/bsd/compiler_rt/dist/lib/xray/ |
H A D | xray_trampoline_AArch64.S | 28 STP Q6, Q7, [SP, #-32]! 43 LDP Q6, Q7, [SP], #32 116 STP Q6, Q7, [SP, #-32]! 133 LDP Q6, Q7, [SP], #32
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64CallingConvention.td | 105 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>, 107 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>, 109 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>, 111 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>, 114 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>, 116 CCAssignToReg<[Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>, 149 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>, 158 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>, 160 CCAssignToReg<[Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>, 240 [Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7]>>, [all …]
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H A D | AArch64CallingConvention.cpp | 37 AArch64::Q6, AArch64::Q7};
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H A D | AArch64PBQPRegAlloc.cpp | 131 case AArch64::Q6: in isOdd()
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H A D | AArch64SchedPredicates.td | 176 CheckRegOperand<0, Q6>,
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H A D | AArch64RegisterInfo.td | 397 def Q6 : AArch64Reg<6, "q6", [D6], ["v6", ""]>, DwarfRegAlias<B6>; 801 def Z6 : AArch64Reg<6, "z6", [Q6, Z6_HI]>, DwarfRegNum<[102]>;
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/netbsd/external/gpl3/gcc/dist/libquadmath/math/ |
H A D | expm1q.c | 75 Q6 = 3.697714952261803935521187272204485251835E3Q, variable 145 + Q6) * x + Q5) * x + Q4) * x + Q3) * x + Q2) * x + Q1) * x + Q0; in expm1q()
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H A D | log1pq.c | 82 Q6 = 6.132189329546557743179177159925690841200E5Q, variable 240 + Q6) * x in log1pq()
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H A D | acosq.c | 116 Q6 = 6.745883931909770880159915641984874746358E1Q, variable 223 + Q6) * t in acosq()
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/netbsd/external/gpl3/gcc.old/dist/libquadmath/math/ |
H A D | expm1q.c | 75 Q6 = 3.697714952261803935521187272204485251835E3Q, variable 145 + Q6) * x + Q5) * x + Q4) * x + Q3) * x + Q2) * x + Q1) * x + Q0; in expm1q()
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H A D | log1pq.c | 82 Q6 = 6.132189329546557743179177159925690841200E5Q, variable 240 + Q6) * x in log1pq()
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H A D | acosq.c | 116 Q6 = 6.745883931909770880159915641984874746358E1Q, variable 223 + Q6) * t in acosq()
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/netbsd/lib/libm/src/ |
H A D | b_tgamma.c | 114 #define Q6 -1.76012741431666995019222898833e-03 macro 255 q = Q0 +z*(Q1+z*(Q2+z*(Q3+z*(Q4+z*(Q5+z*(Q6+z*(Q7+z*Q8))))))); in ratfun_gam()
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/netbsd/lib/libm/noieee_src/ |
H A D | n_gamma.c | 104 #define Q6 -1.76012741431666995019222898833e-03 macro 269 q = Q0 +z*(Q1+z*(Q2+z*(Q3+z*(Q4+z*(Q5+z*(Q6+z*(Q7+z*Q8))))))); in ratfun_gam()
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/netbsd/tests/usr.bin/xlint/lint1/ |
H A D | queries.c | 158 Q6(int i) in Q6() function
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/netbsd/external/gpl3/gcc.old/dist/libgcc/config/avr/libf7/ |
H A D | libf7-asm.sx | 1091 #define Q6 16 1092 #define Q7 Q6+1 1119 wmov Q6, Q0 1169 rol Q6 1177 wmov C5, Q6
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/netbsd/external/gpl3/gcc/dist/libgcc/config/avr/libf7/ |
H A D | libf7-asm.sx | 1091 #define Q6 16 1092 #define Q7 Q6+1 1119 wmov Q6, Q0 1169 rol Q6 1177 wmov C5, Q6
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCTargetDesc.cpp | 312 {codeview::RegisterId::ARM_NQ6, ARM::Q6}, in initLLVMToCVRegMapping()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCTargetDesc.cpp | 205 {codeview::RegisterId::ARM64_Q6, AArch64::Q6}, in initLLVMToCVRegMapping()
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H A D | AArch64InstPrinter.cpp | 1184 case AArch64::Q5: Reg = AArch64::Q6; break; in getNextVectorRegister() 1185 case AArch64::Q6: Reg = AArch64::Q7; break; in getNextVectorRegister()
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/netbsd/external/bsd/iscsi/dist/doc/ |
H A D | FAQ | 150 Q6. What initiators work with the NetBSD iSCSI target?
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Sparc/Disassembler/ |
H A D | SparcDisassembler.cpp | 97 SP::Q6, SP::Q14, ~0U, ~0U,
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
H A D | SparcRegisterInfo.td | 274 def Q6 : Rq<24, "F24", [D12, D13]>;
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/VE/Disassembler/ |
H A D | VEDisassembler.cpp | 93 VE::Q0, VE::Q1, VE::Q2, VE::Q3, VE::Q4, VE::Q5, VE::Q6, VE::Q7,
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64Disassembler.cpp | 321 AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, 674 AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9,
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