Home
last modified time | relevance | path

Searched refs:RB_OVERFLOW (Results 1 – 14 of 14) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_navi10_ih.c221 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in navi10_ih_get_wptr()
226 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in navi10_ih_get_wptr()
228 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in navi10_ih_get_wptr()
H A Damdgpu_cz_ih.c201 if (REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) { in cz_ih_get_wptr()
202 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in cz_ih_get_wptr()
H A Damdgpu_iceland_ih.c201 if (REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) { in iceland_ih_get_wptr()
202 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in iceland_ih_get_wptr()
H A Damdgpu_tonga_ih.c203 if (REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) { in tonga_ih_get_wptr()
204 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in tonga_ih_get_wptr()
H A Damdgpu_vega10_ih.c387 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega10_ih_get_wptr()
402 if (!REG_GET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW)) in vega10_ih_get_wptr()
405 wptr = REG_SET_FIELD(wptr, IH_RB_WPTR, RB_OVERFLOW, 0); in vega10_ih_get_wptr()
H A Dsid.h668 # define RB_OVERFLOW (1 << 0) macro
/netbsd/sys/external/bsd/drm2/dist/drm/radeon/
H A Dsid.h664 # define RB_OVERFLOW (1 << 0) macro
H A Dcikd.h814 # define RB_OVERFLOW (1 << 0) macro
H A Devergreend.h1233 # define RB_OVERFLOW (1 << 0) macro
H A Dr600d.h672 # define RB_OVERFLOW (1 << 0) macro
H A Dradeon_r600.c4082 if (wptr & RB_OVERFLOW) { in r600_get_ih_wptr()
4083 wptr &= ~RB_OVERFLOW; in r600_get_ih_wptr()
H A Dradeon_evergreen.c4692 if (wptr & RB_OVERFLOW) { in evergreen_get_ih_wptr()
4693 wptr &= ~RB_OVERFLOW; in evergreen_get_ih_wptr()
H A Dradeon_si.c6226 if (wptr & RB_OVERFLOW) { in si_get_ih_wptr()
6227 wptr &= ~RB_OVERFLOW; in si_get_ih_wptr()
H A Dradeon_cik.c7518 if (wptr & RB_OVERFLOW) { in cik_get_ih_wptr()
7519 wptr &= ~RB_OVERFLOW; in cik_get_ih_wptr()