/netbsd/external/gpl3/gdb/dist/ld/testsuite/ld-mmix/ |
H A D | greg-7.d | 45 0+21 l \*REG\* 0+ P 46 0+22 l \*REG\* 0+ O 47 0+23 l \*REG\* 0+ N 48 0+24 l \*REG\* 0+ M 49 0+25 l \*REG\* 0+ L 50 0+26 l \*REG\* 0+ K 51 0+27 l \*REG\* 0+ J 52 0+28 l \*REG\* 0+ I 53 0+29 l \*REG\* 0+ H 54 0+2a l \*REG\* 0+ G [all …]
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H A D | greg-6.d | 45 0+20 l \*REG\* 0+ P 46 0+21 l \*REG\* 0+ O 47 0+22 l \*REG\* 0+ N 48 0+23 l \*REG\* 0+ M 49 0+24 l \*REG\* 0+ L 50 0+25 l \*REG\* 0+ K 51 0+26 l \*REG\* 0+ J 52 0+27 l \*REG\* 0+ I 53 0+28 l \*REG\* 0+ H 54 0+29 l \*REG\* 0+ G [all …]
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/netbsd/external/gpl3/gdb.old/dist/ld/testsuite/ld-mmix/ |
H A D | greg-6.d | 45 0+20 l \*REG\* 0+ P 46 0+21 l \*REG\* 0+ O 47 0+22 l \*REG\* 0+ N 48 0+23 l \*REG\* 0+ M 49 0+24 l \*REG\* 0+ L 50 0+25 l \*REG\* 0+ K 51 0+26 l \*REG\* 0+ J 52 0+27 l \*REG\* 0+ I 53 0+28 l \*REG\* 0+ H 54 0+29 l \*REG\* 0+ G [all …]
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H A D | greg-7.d | 45 0+21 l \*REG\* 0+ P 46 0+22 l \*REG\* 0+ O 47 0+23 l \*REG\* 0+ N 48 0+24 l \*REG\* 0+ M 49 0+25 l \*REG\* 0+ L 50 0+26 l \*REG\* 0+ K 51 0+27 l \*REG\* 0+ J 52 0+28 l \*REG\* 0+ I 53 0+29 l \*REG\* 0+ H 54 0+2a l \*REG\* 0+ G [all …]
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/netbsd/sys/arch/sh3/sh3/ |
H A D | devreg.c | 103 SH ## x ## REG(TRA); \ 107 SH ## x ## REG(BARA); \ 110 SH ## x ## REG(BBRA); \ 111 SH ## x ## REG(BARB); \ 114 SH ## x ## REG(BBRB); \ 115 SH ## x ## REG(BDRB); \ 117 SH ## x ## REG(BRCR); \ 119 SH ## x ## REG(PTEH); \ 120 SH ## x ## REG(TEA); \ 121 SH ## x ## REG(TTB); \ [all …]
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/netbsd/external/gpl3/gdb/dist/gas/config/ |
H A D | rx-parse.y | 1011 : REG ',' REG 1017 | REG ',' REG ',' REG 1024 : REG ',' REG 1034 : REG ',' REG 1059 : REG ',' REG 1066 : REG ',' REG 1078 : REG ',' REG 1089 : REG ',' REG 1103 | REG ',' REG 1107 | REG ',' REG ',' REG [all …]
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H A D | bfin-parse.y | 929 | REG ASSIGN REG plus_minus REG COMMA REG ASSIGN REG plus_minus REG amod1 947 | REG ASSIGN REG op_bar_op REG COMMA REG ASSIGN REG op_bar_op REG amod2 1020 | REG ASSIGN c_align LPAREN REG COMMA REG RPAREN 1117 | REG ASSIGN REG plus_minus REG amod1 1364 | REG ASSIGN REG op_bar_op REG amod0 1597 | REG ASSIGN REG BAR REG 1607 | REG ASSIGN REG CARET REG 1743 | REG ASSIGN REG AMPERSAND REG 1760 | REG ASSIGN REG 3247 | LBRACK REG _PLUS_PLUS REG RBRACK ASSIGN REG [all …]
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/netbsd/external/gpl3/binutils.old/dist/gas/config/ |
H A D | rx-parse.y | 1011 : REG ',' REG 1017 | REG ',' REG ',' REG 1024 : REG ',' REG 1034 : REG ',' REG 1059 : REG ',' REG 1066 : REG ',' REG 1078 : REG ',' REG 1089 : REG ',' REG 1103 | REG ',' REG 1107 | REG ',' REG ',' REG [all …]
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H A D | bfin-parse.y | 929 | REG ASSIGN REG plus_minus REG COMMA REG ASSIGN REG plus_minus REG amod1 947 | REG ASSIGN REG op_bar_op REG COMMA REG ASSIGN REG op_bar_op REG amod2 1020 | REG ASSIGN c_align LPAREN REG COMMA REG RPAREN 1117 | REG ASSIGN REG plus_minus REG amod1 1364 | REG ASSIGN REG op_bar_op REG amod0 1597 | REG ASSIGN REG BAR REG 1607 | REG ASSIGN REG CARET REG 1743 | REG ASSIGN REG AMPERSAND REG 1760 | REG ASSIGN REG 3247 | LBRACK REG _PLUS_PLUS REG RBRACK ASSIGN REG [all …]
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/netbsd/external/gpl3/binutils/dist/gas/config/ |
H A D | rx-parse.y | 1011 : REG ',' REG 1017 | REG ',' REG ',' REG 1024 : REG ',' REG 1034 : REG ',' REG 1059 : REG ',' REG 1066 : REG ',' REG 1078 : REG ',' REG 1089 : REG ',' REG 1103 | REG ',' REG 1107 | REG ',' REG ',' REG [all …]
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H A D | bfin-parse.y | 932 | REG ASSIGN REG plus_minus REG COMMA REG ASSIGN REG plus_minus REG amod1 950 | REG ASSIGN REG op_bar_op REG COMMA REG ASSIGN REG op_bar_op REG amod2 1023 | REG ASSIGN c_align LPAREN REG COMMA REG RPAREN 1120 | REG ASSIGN REG plus_minus REG amod1 1367 | REG ASSIGN REG op_bar_op REG amod0 1600 | REG ASSIGN REG BAR REG 1610 | REG ASSIGN REG CARET REG 1746 | REG ASSIGN REG AMPERSAND REG 1763 | REG ASSIGN REG 3250 | LBRACK REG _PLUS_PLUS REG RBRACK ASSIGN REG [all …]
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/netbsd/external/gpl3/gdb.old/dist/gas/config/ |
H A D | rx-parse.y | 1011 : REG ',' REG 1017 | REG ',' REG ',' REG 1024 : REG ',' REG 1034 : REG ',' REG 1059 : REG ',' REG 1066 : REG ',' REG 1078 : REG ',' REG 1089 : REG ',' REG 1103 | REG ',' REG 1107 | REG ',' REG ',' REG [all …]
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H A D | bfin-parse.y | 929 | REG ASSIGN REG plus_minus REG COMMA REG ASSIGN REG plus_minus REG amod1 947 | REG ASSIGN REG op_bar_op REG COMMA REG ASSIGN REG op_bar_op REG amod2 1020 | REG ASSIGN c_align LPAREN REG COMMA REG RPAREN 1117 | REG ASSIGN REG plus_minus REG amod1 1364 | REG ASSIGN REG op_bar_op REG amod0 1597 | REG ASSIGN REG BAR REG 1607 | REG ASSIGN REG CARET REG 1743 | REG ASSIGN REG AMPERSAND REG 1760 | REG ASSIGN REG 3247 | LBRACK REG _PLUS_PLUS REG RBRACK ASSIGN REG [all …]
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/netbsd/usr.sbin/gspa/gspa/ |
H A D | gsp_inst.c | 128 {"ADDC",0x4200, TWOREG, {REG, REG, 0, 0}}, 131 {"ADDXY",0xE000,TWOREG, {REG, REG, 0, 0}}, 144 {"CMPXY",0xE400,TWOREG, {REG, REG, 0, 0}}, 145 {"CPW", 0xE600, TWOREG, {REG, REG, 0, 0}}, 146 {"CVXYL",0xE800,TWOREG, {REG, REG, 0, 0}}, 149 {"DIVS",0x5800, TWOREG, {REG, REG, 0, 0}}, 150 {"DIVU",0x5A00, TWOREG, {REG, REG, 0, 0}}, 151 {"DRAV",0xF600, TWOREG, {REG, REG, 0, 0}}, 210 {"LMO", 0x6A00, TWOREG, {REG, REG, 0, 0}}, 213 {"MODS",0x6C00, TWOREG, {REG, REG, 0, 0}}, [all …]
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn10/ |
H A D | amdgpu_hw_translate_dcn10.c | 56 #define REG(reg_name)\ macro 104 case REG(DC_GPIO_HPD_A): in offset_to_id() 131 case REG(DC_GPIO_SYNCA_A): in offset_to_id() 146 case REG(DC_GPIO_GENLK_A): in offset_to_id() 170 case REG(DC_GPIO_DDC1_A): in offset_to_id() 173 case REG(DC_GPIO_DDC2_A): in offset_to_id() 176 case REG(DC_GPIO_DDC3_A): in offset_to_id() 179 case REG(DC_GPIO_DDC4_A): in offset_to_id() 182 case REG(DC_GPIO_DDC5_A): in offset_to_id() 185 case REG(DC_GPIO_DDC6_A): in offset_to_id() [all …]
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dce120/ |
H A D | amdgpu_hw_translate_dce120.c | 56 #define REG(reg_name)\ macro 104 case REG(DC_GPIO_HPD_A): in offset_to_id() 131 case REG(DC_GPIO_SYNCA_A): in offset_to_id() 146 case REG(DC_GPIO_GENLK_A): in offset_to_id() 170 case REG(DC_GPIO_DDC1_A): in offset_to_id() 173 case REG(DC_GPIO_DDC2_A): in offset_to_id() 176 case REG(DC_GPIO_DDC3_A): in offset_to_id() 179 case REG(DC_GPIO_DDC4_A): in offset_to_id() 182 case REG(DC_GPIO_DDC5_A): in offset_to_id() 185 case REG(DC_GPIO_DDC6_A): in offset_to_id() [all …]
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/netbsd/external/gpl3/gdb/dist/sim/rl78/ |
H A D | cpu.c | 59 #define REG(r) ((regbase)->r) macro 107 case RL78_Reg_AX: return REG (a) * 256 + REG (x); in get_reg() 108 case RL78_Reg_BC: return REG (b) * 256 + REG (c); in get_reg() 109 case RL78_Reg_DE: return REG (d) * 256 + REG (e); in get_reg() 110 case RL78_Reg_HL: return REG (h) * 256 + REG (l); in get_reg() 138 REG (a) = val >> 8; in set_reg() 139 REG (x) = val & 0xff; in set_reg() 142 REG (b) = val >> 8; in set_reg() 143 REG (c) = val & 0xff; in set_reg() 146 REG (d) = val >> 8; in set_reg() [all …]
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/netbsd/external/gpl3/gdb.old/dist/sim/rl78/ |
H A D | cpu.c | 59 #define REG(r) ((regbase)->r) macro 107 case RL78_Reg_AX: return REG (a) * 256 + REG (x); in get_reg() 108 case RL78_Reg_BC: return REG (b) * 256 + REG (c); in get_reg() 109 case RL78_Reg_DE: return REG (d) * 256 + REG (e); in get_reg() 110 case RL78_Reg_HL: return REG (h) * 256 + REG (l); in get_reg() 138 REG (a) = val >> 8; in set_reg() 139 REG (x) = val & 0xff; in set_reg() 142 REG (b) = val >> 8; in set_reg() 143 REG (c) = val & 0xff; in set_reg() 146 REG (d) = val >> 8; in set_reg() [all …]
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
H A D | amdgpu_dcn10_dpp_cm.c | 47 #define REG(reg)\ macro 140 gam_regs.csc_c11_c12 = REG(CM_COMA_C11_C12); in program_gamut_remap() 141 gam_regs.csc_c33_c34 = REG(CM_COMA_C33_C34); in program_gamut_remap() 150 gam_regs.csc_c11_c12 = REG(CM_COMB_C11_C12); in program_gamut_remap() 151 gam_regs.csc_c33_c34 = REG(CM_COMB_C33_C34); in program_gamut_remap() 225 gam_regs.csc_c11_c12 = REG(CM_OCSC_C11_C12); in dpp1_cm_program_color_matrix() 226 gam_regs.csc_c33_c34 = REG(CM_OCSC_C33_C34); in dpp1_cm_program_color_matrix() 230 gam_regs.csc_c11_c12 = REG(CM_COMB_C11_C12); in dpp1_cm_program_color_matrix() 231 gam_regs.csc_c33_c34 = REG(CM_COMB_C33_C34); in dpp1_cm_program_color_matrix() 481 gam_regs.csc_c11_c12 = REG(CM_ICSC_C11_C12); in dpp1_program_input_csc() [all …]
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn20/ |
H A D | amdgpu_hw_translate_dcn20.c | 59 #undef REG 60 #define REG(reg_name)\ macro 78 case REG(DC_GPIO_GENERIC_A): in offset_to_id() 108 case REG(DC_GPIO_HPD_A): in offset_to_id() 135 case REG(DC_GPIO_GENLK_A): in offset_to_id() 159 case REG(DC_GPIO_DDC1_A): in offset_to_id() 162 case REG(DC_GPIO_DDC2_A): in offset_to_id() 165 case REG(DC_GPIO_DDC3_A): in offset_to_id() 168 case REG(DC_GPIO_DDC4_A): in offset_to_id() 171 case REG(DC_GPIO_DDC5_A): in offset_to_id() [all …]
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/netbsd/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn21/ |
H A D | amdgpu_hw_translate_dcn21.c | 59 #undef REG 60 #define REG(reg_name)\ macro 77 case REG(DC_GPIO_GENERIC_A): in offset_to_id() 111 case REG(DC_GPIO_HPD_A): in offset_to_id() 138 case REG(DC_GPIO_GENLK_A): in offset_to_id() 162 case REG(DC_GPIO_DDC1_A): in offset_to_id() 165 case REG(DC_GPIO_DDC2_A): in offset_to_id() 168 case REG(DC_GPIO_DDC3_A): in offset_to_id() 171 case REG(DC_GPIO_DDC4_A): in offset_to_id() 174 case REG(DC_GPIO_DDC5_A): in offset_to_id() [all …]
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/netbsd/sys/arch/luna68k/stand/boot/ |
H A D | sio.c | 107 int rr0 = sioreg(REG(unit, RR0), 0); in siointr() 108 int rr1 = sioreg(REG(unit, RR1), 0); in siointr() 116 sioreg(REG(unit, WR0), WR0_ERRRST); in siointr() 216 sioreg(REG(0, WR0), WR0_CHANRST); in sioinit() 224 sioreg(REG(0, WR0), WR0_RSTINT); in sioinit() 232 sioreg(REG(0, WR0), WR0_RSTINT); in sioinit() 234 sioreg(REG(0, WR1), WR1_RXALLS); in sioinit() 237 sioreg(REG(1, WR0), WR0_CHANRST); in sioinit() 240 sioreg(REG(1, WR0), WR0_RSTINT); in sioinit() 248 sioreg(REG(1, WR0), WR0_RSTINT); in sioinit() [all …]
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/netbsd/sys/dev/tc/ |
H A D | sfbplus.c | 624 REG(vdac, bt_reg) = 0x0; tc_wmb(); in bt459init() 625 REG(vdac, bt_reg) = 0x0; tc_wmb(); in bt459init() 662 REG(vdac, bt_reg) = 0; tc_wmb(); in bt459init() 663 REG(vdac, bt_reg) = 0; tc_wmb(); in bt459init() 664 REG(vdac, bt_reg) = 0; tc_wmb(); in bt459init() 862 REG(hw, bt_reg) = x; tc_wmb(); in bt459locate() 864 REG(hw, bt_reg) = y; tc_wmb(); in bt459locate() 920 REG(hw, bt_reg) = 0; tc_wmb(); in bt459shape() 921 REG(hw, bt_reg) = 0; tc_wmb(); in bt459shape() 936 REG(hw, bt_reg) = 0; tc_wmb(); in bt459shape() [all …]
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/netbsd/external/gpl3/gdb/dist/opcodes/ |
H A D | cr16-opc.c | 478 REG(r12_L, 12, CR16_R_REGTYPE), 479 REG(r13_L, 13, CR16_R_REGTYPE), 528 REG(dbs, 0, CR16_P_REGTYPE), 529 REG(dsr, 1, CR16_P_REGTYPE), 530 REG(dcr, 2, CR16_P_REGTYPE), 531 REG(car0, 4, CR16_P_REGTYPE), 532 REG(car1, 6, CR16_P_REGTYPE), 533 REG(cfg, 8, CR16_P_REGTYPE), 534 REG(psr, 9, CR16_P_REGTYPE), 536 REG(isp, 12, CR16_P_REGTYPE), [all …]
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/netbsd/external/gpl3/binutils.old/dist/opcodes/ |
H A D | cr16-opc.c | 478 REG(r12_L, 12, CR16_R_REGTYPE), 479 REG(r13_L, 13, CR16_R_REGTYPE), 528 REG(dbs, 0, CR16_P_REGTYPE), 529 REG(dsr, 1, CR16_P_REGTYPE), 530 REG(dcr, 2, CR16_P_REGTYPE), 531 REG(car0, 4, CR16_P_REGTYPE), 532 REG(car1, 6, CR16_P_REGTYPE), 533 REG(cfg, 8, CR16_P_REGTYPE), 534 REG(psr, 9, CR16_P_REGTYPE), 536 REG(isp, 12, CR16_P_REGTYPE), [all …]
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