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Searched refs:RLC_GPU_IOV_VIRT_RESET_REQ__SOFT_PF_FLR_MASK (Results 1 – 5 of 5) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h9523 #define RLC_GPU_IOV_VIRT_RESET_REQ__SOFT_PF_FLR_MASK 0x80000000 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h27403 #define RLC_GPU_IOV_VIRT_RESET_REQ__SOFT_PF_FLR_MASK … macro
H A Dgc_9_1_sh_mask.h28690 #define RLC_GPU_IOV_VIRT_RESET_REQ__SOFT_PF_FLR_MASK … macro
H A Dgc_9_2_1_sh_mask.h29037 #define RLC_GPU_IOV_VIRT_RESET_REQ__SOFT_PF_FLR_MASK … macro
H A Dgc_10_1_0_sh_mask.h39833 #define RLC_GPU_IOV_VIRT_RESET_REQ__SOFT_PF_FLR_MASK … macro