/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | DetectDeadLanes.cpp | 109 void PutInWorklist(unsigned RegIdx) { in PutInWorklist() argument 110 if (WorklistMembers.test(RegIdx)) in PutInWorklist() 112 WorklistMembers.set(RegIdx); in PutInWorklist() 113 Worklist.push_back(RegIdx); in PutInWorklist() 361 DefinedByCopy.set(RegIdx); in determineInitialDefinedLanes() 362 PutInWorklist(RegIdx); in determineInitialDefinedLanes() 493 for (unsigned RegIdx = 0; RegIdx < NumVirtRegs; ++RegIdx) { in runOnce() local 497 VRegInfo &Info = VRegInfos[RegIdx]; in runOnce() 504 unsigned RegIdx = Worklist.front(); in runOnce() local 506 WorklistMembers.reset(RegIdx); in runOnce() [all …]
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H A D | SplitKit.cpp | 466 VNInfo *SplitEditor::defValue(unsigned RegIdx, in defValue() argument 595 bool Late = RegIdx != 0; in defFromParent() 877 unsigned RegIdx = AssignI.value(); in removeBackCopies() local 1139 unsigned RegIdx; in transferValues() local 1142 RegIdx = 0; in transferValues() 1144 RegIdx = AssignI.value(); in transferValues() 1150 RegIdx = 0; in transferValues() 1280 LiveIntervalCalc &LIC = getLICalc(RegIdx); in extendPHIKillRanges() 1313 : MO(O), RegIdx(R), Next(N) {} in rewriteAssigned() 1316 unsigned RegIdx; in rewriteAssigned() member [all …]
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H A D | SplitKit.h | 353 LiveIntervalCalc &getLICalc(unsigned RegIdx) { in getLICalc() argument 354 return LICalc[SpillMode != SM_Partition && RegIdx != 0]; in getLICalc() 386 VNInfo *defValue(unsigned RegIdx, const VNInfo *ParentVNI, SlotIndex Idx, 393 void forceRecompute(unsigned RegIdx, const VNInfo &ParentVNI); 401 VNInfo *defFromParent(unsigned RegIdx, 453 bool Late, unsigned RegIdx);
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 1614 return ((RegIdx.Index >= 2 && RegIdx.Index <= 7) in isMM16AsmReg() 1615 || RegIdx.Index == 16 || RegIdx.Index == 17); in isMM16AsmReg() 1622 (RegIdx.Index >= 2 && RegIdx.Index <= 7) || in isMM16AsmRegZero() 1629 return (RegIdx.Index == 0 || (RegIdx.Index >= 2 && RegIdx.Index <= 3) || in isMM16AsmRegMoveP() 1630 (RegIdx.Index >= 16 && RegIdx.Index <= 20)); in isMM16AsmRegMoveP() 1636 return RegIdx.Index >= 4 && RegIdx.Index <= 6; in isMM16AsmRegMovePPairFirst() 1642 return (RegIdx.Index == 21 || RegIdx.Index == 22 || in isMM16AsmRegMovePPairSecond() 1643 (RegIdx.Index >= 5 && RegIdx.Index <= 7)); in isMM16AsmRegMovePPairSecond() 1714 OS << "RegIdx<" << RegIdx.Index << ":" << RegIdx.Kind << ", " in print() 1715 << StringRef(RegIdx.Tok.Data, RegIdx.Tok.Length) << ">"; in print() [all …]
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.cpp | 201 unsigned RegIdx = State.getFirstUnallocated(RegList); in CC_ARM_AAPCS_Custom_Aggregate() local 206 while (RegIdx % RegAlign != 0 && RegIdx < RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate() 207 State.AllocateReg(RegList[RegIdx++]); in CC_ARM_AAPCS_Custom_Aggregate() 248 unsigned RegIdx = State.getFirstUnallocated(RegList); in CC_ARM_AAPCS_Custom_Aggregate() local 250 if (RegIdx >= RegList.size()) in CC_ARM_AAPCS_Custom_Aggregate() 253 It.convertToReg(State.AllocateReg(RegList[RegIdx++])); in CC_ARM_AAPCS_Custom_Aggregate()
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H A D | ARMISelLowering.cpp | 4300 unsigned RegIdx = CCInfo.getFirstUnallocated(GPRArgRegs); in LowerFormalArguments() local 4301 if (RegIdx != array_lengthof(GPRArgRegs)) in LowerFormalArguments() 4302 ArgRegBegin = std::min(ArgRegBegin, (unsigned)GPRArgRegs[RegIdx]); in LowerFormalArguments()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
H A D | AVRAsmPrinter.cpp | 118 unsigned RegIdx = ByteNumber / BytesPerReg; in PrintAsmOperand() local 119 assert(RegIdx < NumOpRegs && "Multibyte index out of range."); in PrintAsmOperand() 121 Reg = MI->getOperand(OpNum + RegIdx).getReg(); in PrintAsmOperand()
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H A D | AVRISelLowering.cpp | 1040 unsigned RegIdx = RegLastIdx + TotalBytes; in analyzeArguments() local 1041 RegLastIdx = RegIdx; in analyzeArguments() 1043 if (RegIdx >= array_lengthof(RegList8)) { in analyzeArguments() 1058 Reg = CCInfo.AllocateReg(RegList8[RegIdx]); in analyzeArguments() 1060 Reg = CCInfo.AllocateReg(RegList16[RegIdx]); in analyzeArguments() 1069 RegIdx -= VT.getStoreSize(); in analyzeArguments() 1106 int RegIdx = TotalBytes - 1; in analyzeReturnValues() local 1111 Reg = CCInfo.AllocateReg(RegList8[RegIdx]); in analyzeReturnValues() 1113 Reg = CCInfo.AllocateReg(RegList16[RegIdx]); in analyzeReturnValues() 1120 RegIdx -= VT.getStoreSize(); in analyzeReturnValues()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64CollectLOH.cpp | 553 int RegIdx = mapRegToGPRIndex(LI.PhysReg); in runOnMachineFunction() local 554 if (RegIdx >= 0) in runOnMachineFunction() 555 LOHInfos[RegIdx].OneUser = true; in runOnMachineFunction()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsSEISelDAGToDAG.cpp | 78 unsigned MipsSEDAGToDAGISel::getMSACtrlReg(const SDValue RegIdx) const { in getMSACtrlReg() 79 uint64_t RegNum = cast<ConstantSDNode>(RegIdx)->getZExtValue(); in getMSACtrlReg() 844 SDValue RegIdx = Node->getOperand(2); in trySelect() local 846 getMSACtrlReg(RegIdx), MVT::i32); in trySelect() 914 SDValue RegIdx = Node->getOperand(2); in trySelect() local 917 getMSACtrlReg(RegIdx), Value); in trySelect()
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H A D | MipsSEISelDAGToDAG.h | 35 unsigned getMSACtrlReg(const SDValue RegIdx) const;
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86ExpandPseudo.cpp | 667 for (int64_t OpndIdx = 3, RegIdx = 0; in ExpandVastartSaveXmmRegs() local 669 OpndIdx++, RegIdx++) { in ExpandVastartSaveXmmRegs() 671 int64_t Offset = FrameOffset + VarArgsRegsOffset + RegIdx * 16; in ExpandVastartSaveXmmRegs()
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H A D | X86SpeculativeLoadHardening.cpp | 1874 unsigned RegIdx = Log2_32(RegBytes); in canHardenRegister() local 1875 assert(RegIdx < 4 && "Unsupported register size"); in canHardenRegister() 1887 if (RC == NOREXRegClasses[RegIdx]) in canHardenRegister() 1893 return RC->hasSuperClassEq(GPRRegClasses[RegIdx]); in canHardenRegister()
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H A D | X86FastISel.cpp | 2636 unsigned RegIdx = X86::sub_16bit; in fastLowerIntrinsicCall() local 2637 ResultReg = fastEmitInst_extractsubreg(MVT::i16, ResultReg, RegIdx); in fastLowerIntrinsicCall()
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H A D | X86ISelLowering.cpp | 34011 for (unsigned RegIdx = 0; SavedRegs[RegIdx]; ++RegIdx) { in EmitSjLjDispatchBlock() local 34012 unsigned Reg = SavedRegs[RegIdx]; in EmitSjLjDispatchBlock()
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/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/LiveDebugValues/ |
H A D | VarLocBasedImpl.cpp | 1345 LocIndex RegIdx = LocIndex::fromRawInteger(*It); in collectAllVarLocs() local 1346 Collected.push_back(VarLocIDs[RegIdx]); in collectAllVarLocs()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
H A D | AMDGPUAsmParser.cpp | 2452 unsigned RegIdx = RegNum / AlignSize; in getRegularReg() local 2461 if (RegIdx >= RC.getNumRegs()) { in getRegularReg() 2466 return RC.getRegister(RegIdx); in getRegularReg()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 6848 unsigned RegIdx = 3; in shouldOmitPredicateOperand() local 6856 RegIdx = 4; in shouldOmitPredicateOperand() 6858 if (static_cast<ARMOperand &>(*Operands[RegIdx]).isReg() && in shouldOmitPredicateOperand() 6860 static_cast<ARMOperand &>(*Operands[RegIdx]).getReg()) || in shouldOmitPredicateOperand() 6862 static_cast<ARMOperand &>(*Operands[RegIdx]).getReg()))) in shouldOmitPredicateOperand()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 1880 unsigned RegIdx = CCInfo.getFirstUnallocated(ArgVGPRs); in allocateVGPR32Input() local 1881 if (RegIdx == ArgVGPRs.size()) { in allocateVGPR32Input() 1888 unsigned Reg = ArgVGPRs[RegIdx]; in allocateVGPR32Input() 1902 unsigned RegIdx = CCInfo.getFirstUnallocated(ArgSGPRs); in allocateSGPR32InputImpl() local 1903 if (RegIdx == ArgSGPRs.size()) in allocateSGPR32InputImpl() 1906 unsigned Reg = ArgSGPRs[RegIdx]; in allocateSGPR32InputImpl()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 6739 unsigned RegIdx = State.getFirstUnallocated(ArgGPRs); in CC_RISCV() local 6741 if (RegIdx != array_lengthof(ArgGPRs) && RegIdx % 2 == 1) in CC_RISCV()
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