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Searched refs:SDMA0_RLC0_RB_WPTR_POLL_ADDR_LO__ADDR__SHIFT (Results 1 – 9 of 9) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h1425 #define SDMA0_RLC0_RB_WPTR_POLL_ADDR_LO__ADDR__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h1619 #define SDMA0_RLC0_RB_WPTR_POLL_ADDR_LO__ADDR__SHIFT 0x2 macro
H A Dsdma0_4_2_2_sh_mask.h1639 #define SDMA0_RLC0_RB_WPTR_POLL_ADDR_LO__ADDR__SHIFT … macro
H A Dsdma0_4_2_sh_mask.h1629 #define SDMA0_RLC0_RB_WPTR_POLL_ADDR_LO__ADDR__SHIFT … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1194 #define SDMA0_RLC0_RB_WPTR_POLL_ADDR_LO__ADDR__SHIFT 0x2 macro
H A Doss_2_4_sh_mask.h1314 #define SDMA0_RLC0_RB_WPTR_POLL_ADDR_LO__ADDR__SHIFT 0x2 macro
H A Doss_3_0_1_sh_mask.h1764 #define SDMA0_RLC0_RB_WPTR_POLL_ADDR_LO__ADDR__SHIFT 0x2 macro
H A Doss_3_0_sh_mask.h2080 #define SDMA0_RLC0_RB_WPTR_POLL_ADDR_LO__ADDR__SHIFT 0x2 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h1407 #define SDMA0_RLC0_RB_WPTR_POLL_ADDR_LO__ADDR__SHIFT … macro