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Searched refs:SDMA0_STATUS_REG__MC_WR_IDLE_MASK (Results 1 – 9 of 9) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h528 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK … macro
H A Dsdma0_4_0_sh_mask.h529 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK 0x00002000L macro
H A Dsdma0_4_2_2_sh_mask.h535 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK … macro
H A Dsdma0_4_2_sh_mask.h529 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h937 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK 0x2000 macro
H A Doss_2_4_sh_mask.h1017 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK 0x2000 macro
H A Doss_3_0_1_sh_mask.h1035 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK 0x2000 macro
H A Doss_3_0_sh_mask.h1541 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK 0x2000 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h237 #define SDMA0_STATUS_REG__MC_WR_IDLE_MASK … macro