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Searched refs:SDMA1_RLC0_RB_WPTR_HI__OFFSET__SHIFT (Results 1 – 4 of 4) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1472 #define SDMA1_RLC0_RB_WPTR_HI__OFFSET__SHIFT 0x0 macro
H A Dsdma1_4_2_sh_mask.h1478 #define SDMA1_RLC0_RB_WPTR_HI__OFFSET__SHIFT … macro
H A Dsdma1_4_2_2_sh_mask.h1486 #define SDMA1_RLC0_RB_WPTR_HI__OFFSET__SHIFT … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h4036 #define SDMA1_RLC0_RB_WPTR_HI__OFFSET__SHIFT … macro