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Searched refs:SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT (Results 1 – 8 of 8) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h494 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd macro
H A Dsdma1_4_2_sh_mask.h492 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT … macro
H A Dsdma1_4_2_2_sh_mask.h496 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT … macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1456 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd macro
H A Doss_2_4_sh_mask.h1616 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd macro
H A Doss_3_0_1_sh_mask.h2134 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd macro
H A Doss_3_0_sh_mask.h2438 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h2974 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT … macro