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Searched refs:SGPR0 (Results 1 – 7 of 7) sorted by relevance

/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIMachineFunctionInfo.cpp464 return AMDGPU::SGPR0 + NumUserSGPRs; in getNextUserSGPR()
468 return AMDGPU::SGPR0 + NumUserSGPRs + NumSystemSGPRs; in getNextSystemSGPR()
476 Register GitPtrLo = AMDGPU::SGPR0; // Low GIT address passed in in getGITPtrLoReg()
H A DSIInsertWaitcnts.cpp99 unsigned SGPR0; member
477 assert(Reg >= RegisterEncoding.SGPR0 && Reg < SQ_MAX_PGM_SGPRS); in getRegInterval()
478 Result.first = Reg - RegisterEncoding.SGPR0 + NUM_ALL_VGPRS; in getRegInterval()
1600 RegisterEncoding.SGPR0 = TRI->getEncodingValue(AMDGPU::SGPR0); in runOnMachineFunction()
1601 RegisterEncoding.SGPRL = RegisterEncoding.SGPR0 + NumSGPRsMax - 1; in runOnMachineFunction()
H A DAMDGPUCallingConv.td79 SGPR0, SGPR1, SGPR2, SGPR3, SGPR4, SGPR5, SGPR6, SGPR7,
111 SGPR0, SGPR1, SGPR2, SGPR3, SGPR4, SGPR5, SGPR6, SGPR7,
H A DSOPInstructions.td795 // SCC = S_CMPK_EQ_I32 SGPR0, imm
H A DSIInstrInfo.cpp618 bool AlignedDest = ((Reg - AMDGPU::SGPR0) % 2) == 0; in expandSGPRCopy()
619 bool AlignedSrc = ((Src - AMDGPU::SGPR0) % 2) == 0; in expandSGPRCopy()
H A DSIISelLowering.cpp67 if (!CCInfo.isAllocated(AMDGPU::SGPR0 + Reg)) { in findFirstFreeSGPR()
68 return AMDGPU::SGPR0 + Reg; in findFirstFreeSGPR()
/netbsd/external/apache2/llvm/dist/llvm/docs/
H A DAMDGPUUsage.rst1694 32-95 SGPR0-SGPR63 32 Scalar General Purpose
4252 for enabled registers are dense starting at SGPR0: the first enabled register is
4253 SGPR0, the next enabled register is SGPR1 etc.; disabled registers do not have
4602 SGPR0-3 is reserved for use as the scratch V#. Stack usage is assumed if
10391 ``debugtrap(arg)`` ``s_trap 0x01`` ``SGPR0-1``: Reserved for Finalizer HSA ``debugtrap``
10395 ``llvm.trap`` ``s_trap 0x02`` ``SGPR0-1``: Causes wave to be halted with the PC at
10437 ``llvm.trap`` ``s_trap 0x02`` ``SGPR0-1``: Causes wave to be halted with the PC at
10478 …``llvm.trap`` ``s_trap 0x02`` ``SGPR0-1``: *none* Causes wave to be halted wi…
10559 1. SGPR0-3 contain a V# with the following properties (see
10581 offset with the scratch V# in SGPR0-3 to access the stack in a swizzled
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