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Searched refs:SPI_CONFIG_CNTL_1 (Results 1 – 17 of 17) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/radeon/reg_srcs/
H A Devergreen52 0x0000913C SPI_CONFIG_CNTL_1
H A Dcayman39 0x0000913C SPI_CONFIG_CNTL_1
H A Dr600389 0x0000913C SPI_CONFIG_CNTL_1
/netbsd/sys/external/bsd/drm2/dist/drm/radeon/
H A Drv770d.h528 #define SPI_CONFIG_CNTL_1 0x913C macro
H A Dnid.h412 #define SPI_CONFIG_CNTL_1 0x913C macro
H A Dsid.h1135 #define SPI_CONFIG_CNTL_1 0x913C macro
H A Dcikd.h1190 #define SPI_CONFIG_CNTL_1 0x913C macro
H A Dradeon_rv770.c1465 WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(4)); in rv770_gpu_init()
H A Devergreend.h1024 #define SPI_CONFIG_CNTL_1 0x913C macro
H A Dr600d.h449 #define SPI_CONFIG_CNTL_1 0x913C macro
H A Dradeon_ni.c1190 WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(4) | CRC_SIMD_ID_WADDR_DISABLE); in cayman_gpu_init()
H A Dradeon_si.c3323 WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(4)); in si_gpu_init()
4454 case SPI_CONFIG_CNTL_1: in si_vm_reg_valid()
H A Dradeon_evergreen_cs.c3299 case SPI_CONFIG_CNTL_1: in evergreen_vm_reg_valid()
H A Dradeon_r600.c2216 WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(0)); in r600_gpu_init()
H A Dradeon_evergreen.c3569 WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(4)); in evergreen_gpu_init()
H A Dradeon_cik.c3401 WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(4)); in cik_gpu_init()
/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsid.h1134 #define SPI_CONFIG_CNTL_1 0x244F macro