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Searched refs:SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT (Results 1 – 8 of 8) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7821 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT 0x0000000d macro
H A Dgfx_7_2_sh_mask.h8514 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT 0xd macro
H A Dgfx_8_1_sh_mask.h10358 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT 0xd macro
H A Dgfx_8_0_sh_mask.h9960 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT 0xd macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h15961 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT … macro
H A Dgc_9_1_sh_mask.h17270 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h17145 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h23339 #define SPI_PS_INPUT_CNTL_17__CYL_WRAP__SHIFT … macro