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Searched refs:SPI_RESOURCE_RESERVE_CU_10__VGPR__SHIFT (Results 1 – 7 of 7) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h9004 #define SPI_RESOURCE_RESERVE_CU_10__VGPR__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h11022 #define SPI_RESOURCE_RESERVE_CU_10__VGPR__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h10624 #define SPI_RESOURCE_RESERVE_CU_10__VGPR__SHIFT 0x0 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12604 #define SPI_RESOURCE_RESERVE_CU_10__VGPR__SHIFT … macro
H A Dgc_9_1_sh_mask.h13908 #define SPI_RESOURCE_RESERVE_CU_10__VGPR__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h13773 #define SPI_RESOURCE_RESERVE_CU_10__VGPR__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h19851 #define SPI_RESOURCE_RESERVE_CU_10__VGPR__SHIFT … macro