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Searched refs:SPI_RESOURCE_RESERVE_EN_CU_5__QUEUE_MASK__SHIFT (Results 1 – 7 of 7) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h9068 #define SPI_RESOURCE_RESERVE_EN_CU_5__QUEUE_MASK__SHIFT 0x10 macro
H A Dgfx_8_1_sh_mask.h11126 #define SPI_RESOURCE_RESERVE_EN_CU_5__QUEUE_MASK__SHIFT 0x10 macro
H A Dgfx_8_0_sh_mask.h10728 #define SPI_RESOURCE_RESERVE_EN_CU_5__QUEUE_MASK__SHIFT 0x10 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12561 #define SPI_RESOURCE_RESERVE_EN_CU_5__QUEUE_MASK__SHIFT … macro
H A Dgc_9_1_sh_mask.h13865 #define SPI_RESOURCE_RESERVE_EN_CU_5__QUEUE_MASK__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h13730 #define SPI_RESOURCE_RESERVE_EN_CU_5__QUEUE_MASK__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h19808 #define SPI_RESOURCE_RESERVE_EN_CU_5__QUEUE_MASK__SHIFT … macro