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Searched refs:SQ_SOPP__SIMM16__SHIFT (Results 1 – 7 of 7) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9529 #define SQ_SOPP__SIMM16__SHIFT 0x00000000 macro
H A Dgfx_7_2_sh_mask.h13054 #define SQ_SOPP__SIMM16__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h15358 #define SQ_SOPP__SIMM16__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h14960 #define SQ_SOPP__SIMM16__SHIFT 0x0 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2940 #define SQ_SOPP__SIMM16__SHIFT … macro
H A Dgc_9_1_sh_mask.h2788 #define SQ_SOPP__SIMM16__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h2746 #define SQ_SOPP__SIMM16__SHIFT … macro