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Searched refs:SuccSU (Results 1 – 12 of 12) sorted by relevance

/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGVLIW.cpp114 SUnit *SuccSU = D.getSUnit(); in releaseSucc() local
117 if (SuccSU->NumPredsLeft == 0) { in releaseSucc()
119 dumpNode(*SuccSU); in releaseSucc()
126 --SuccSU->NumPredsLeft; in releaseSucc()
128 SuccSU->setDepthToAtLeast(SU->getDepth() + D.getLatency()); in releaseSucc()
132 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) { in releaseSucc()
133 PendingQueue.push_back(SuccSU); in releaseSucc()
H A DScheduleDAGRRList.cpp1201 SUnit *SuccSU = Succ.getSUnit(); in CopyAndMoveSuccessors() local
1202 if (SuccSU->isScheduled) { in CopyAndMoveSuccessors()
1205 AddPredQueued(SuccSU, D); in CopyAndMoveSuccessors()
1241 if (SuccSU->isScheduled) { in InsertCopiesAndMoveSuccs()
1244 AddPredQueued(SuccSU, D); in InsertCopiesAndMoveSuccs()
2386 if (SuccSU->getNode() && SuccSU->getNode()->getOpcode() == ISD::CopyToReg) { in hasOnlyLiveOutUses()
2879 SDNode *N = SuccSU->getNode(); in canClobberPhysRegDefs()
3036 if (SuccSU != &SU) { in PrescheduleNodesWithMultipleUses()
3083 if (SuccSU == &SU) in AddPseudoTwoAddrDeps()
3098 SuccSU = SuccSU->Succs.front().getSUnit(); in AddPseudoTwoAddrDeps()
[all …]
H A DScheduleDAGFast.cpp362 SUnit *SuccSU = Succ.getSUnit(); in CopyAndMoveSuccessors() local
363 if (SuccSU->isScheduled) { in CopyAndMoveSuccessors()
366 AddPred(SuccSU, D); in CopyAndMoveSuccessors()
368 DelDeps.push_back(std::make_pair(SuccSU, D)); in CopyAndMoveSuccessors()
398 SUnit *SuccSU = Succ.getSUnit(); in InsertCopiesAndMoveSuccs() local
399 if (SuccSU->isScheduled) { in InsertCopiesAndMoveSuccs()
402 AddPred(SuccSU, D); in InsertCopiesAndMoveSuccs()
403 DelDeps.push_back(std::make_pair(SuccSU, Succ)); in InsertCopiesAndMoveSuccs()
H A DResourcePriorityQueue.cpp115 SUnit *SuccSU = Succ.getSUnit(); in numberRCValSuccInSU() local
116 const SDNode *ScegN = SuccSU->getNode(); in numberRCValSuccInSU()
/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DGCNMinRegStrategy.cpp215 auto SuccSU = S.getSUnit(); in releaseSuccessors() local
218 assert(SuccSU->isBoundaryNode() || getNumPreds(SuccSU) > 0); in releaseSuccessors()
219 if (!SuccSU->isBoundaryNode() && decNumPreds(SuccSU) == 0) in releaseSuccessors()
220 RQ.push_front(*new (Alloc.Allocate()) Candidate(SuccSU, Priority)); in releaseSuccessors()
H A DSIMachineScheduler.cpp435 SUnit *SuccSU = SuccEdge->getSUnit(); in undoReleaseSucc() local
438 ++SuccSU->WeakPredsLeft; in undoReleaseSucc()
441 ++SuccSU->NumPredsLeft; in undoReleaseSucc()
445 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc() local
448 --SuccSU->WeakPredsLeft; in releaseSucc()
452 if (SuccSU->NumPredsLeft == 0) { in releaseSucc()
454 DAG->dumpNode(*SuccSU); in releaseSucc()
460 --SuccSU->NumPredsLeft; in releaseSucc()
466 SUnit *SuccSU = Succ.getSUnit(); in releaseSuccessors() local
468 if (SuccSU->NodeNum >= DAG->SUnits.size()) in releaseSuccessors()
[all …]
/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DPostRASchedulerList.cpp453 SUnit *SuccSU = SuccEdge->getSUnit(); in ReleaseSucc() local
456 --SuccSU->WeakPredsLeft; in ReleaseSucc()
460 if (SuccSU->NumPredsLeft == 0) { in ReleaseSucc()
462 dumpNode(*SuccSU); in ReleaseSucc()
467 --SuccSU->NumPredsLeft; in ReleaseSucc()
482 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) in ReleaseSucc()
483 PendingQueue.push_back(SuccSU); in ReleaseSucc()
H A DScheduleDAG.cpp225 SUnit *SuccSU = SuccDep.getSUnit(); in setDepthDirty() local
226 if (SuccSU->isDepthCurrent) in setDepthDirty()
227 WorkList.push_back(SuccSU); in setDepthDirty()
304 SUnit *SuccSU = SuccDep.getSUnit(); in ComputeHeight() local
305 if (SuccSU->isHeightCurrent) in ComputeHeight()
307 SuccSU->Height + SuccDep.getLatency()); in ComputeHeight()
310 WorkList.push_back(SuccSU); in ComputeHeight()
H A DScheduleDAGInstrs.cpp1203 bool ScheduleDAGInstrs::canAddEdge(SUnit *SuccSU, SUnit *PredSU) { in canAddEdge() argument
1204 return SuccSU == &ExitSU || !Topo.IsReachable(PredSU, SuccSU); in canAddEdge()
1207 bool ScheduleDAGInstrs::addEdge(SUnit *SuccSU, const SDep &PredDep) { in addEdge() argument
1208 if (SuccSU != &ExitSU) { in addEdge()
1211 if (Topo.IsReachable(PredDep.getSUnit(), SuccSU)) in addEdge()
1213 Topo.AddPredQueued(SuccSU, PredDep.getSUnit()); in addEdge()
1215 SuccSU->addPred(PredDep, /*Required=*/!PredDep.isArtificial()); in addEdge()
H A DMachinePipeliner.cpp693 SUnit *SuccSU = SI.getSUnit(); in isSuccOrder() local
695 if (Visited.count(SuccSU)) in isSuccOrder()
697 if (SuccSU == SUb) in isSuccOrder()
699 Worklist.push_back(SuccSU); in isSuccOrder()
700 Visited.insert(SuccSU); in isSuccOrder()
2447 SUnit *SuccSU = Cur.getSUnit(); in latestCycleInChain() local
2448 if (Visited.count(SuccSU)) in latestCycleInChain()
2454 for (const auto &SI : SuccSU->Succs) in latestCycleInChain()
2457 Visited.insert(SuccSU); in latestCycleInChain()
2796 if (SuccSU->isBoundaryNode()) in checkValidNodeOrder()
[all …]
H A DMachineScheduler.cpp638 SUnit *SuccSU = SuccEdge->getSUnit(); in releaseSucc() local
641 --SuccSU->WeakPredsLeft; in releaseSucc()
643 NextClusterSucc = SuccSU; in releaseSucc()
647 if (SuccSU->NumPredsLeft == 0) { in releaseSucc()
649 dumpNode(*SuccSU); in releaseSucc()
656 if (SuccSU->TopReadyCycle < SU->TopReadyCycle + SuccEdge->getLatency()) in releaseSucc()
657 SuccSU->TopReadyCycle = SU->TopReadyCycle + SuccEdge->getLatency(); in releaseSucc()
659 --SuccSU->NumPredsLeft; in releaseSucc()
660 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) in releaseSucc()
661 SchedImpl->releaseTopNode(SuccSU); in releaseSucc()
/netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DScheduleDAGInstrs.h354 bool canAddEdge(SUnit *SuccSU, SUnit *PredSU);
361 bool addEdge(SUnit *SuccSU, const SDep &PredDep);