Home
last modified time | relevance | path

Searched refs:TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK (Results 1 – 8 of 8) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h10730 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK 0x00000001L macro
H A Dgfx_7_2_sh_mask.h14611 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK 0x1 macro
H A Dgfx_8_1_sh_mask.h17127 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK 0x1 macro
H A Dgfx_8_0_sh_mask.h16539 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK 0x1 macro
/netbsd/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h9094 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK macro
H A Dgc_9_1_sh_mask.h10599 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK macro
H A Dgc_9_2_1_sh_mask.h10429 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK macro
H A Dgc_10_1_0_sh_mask.h15733 #define TCI_CNTL_2__L1_INVAL_ON_WBINVL2_MASK macro